本論文之目的為開發一個高效能電阻式記憶體，來做為下世代記憶體的解決方案。為了確實了解控制元件電阻轉換的製程參數，我們首先研究電極金屬材料與熱退火處理對氧化鉿電容器的影響。研究結果顯示，電極金屬材料進行氧化反應的自由能除了會影響氧化物與電極之間的反應外，也對於決定元件的電阻轉換有很大的重要性。基本上來說，擁有較靠近零點自由能的金屬材料，越容易造成元件產生單極性電阻轉換；而擁有離零點越遠自由能的金屬材料，在熱退火的協助之下，則容易造成元件產生雙極性電阻轉換。根據上述的結果，我們除了成功的以Ru電極製作出單極操作的氧化鉿電阻式記憶體，也成功的以AlCu、Ti、Ta、TaN電極製作出雙極操作的氧化鉿電阻式記憶體。在研究單極性元件的操作特性時，我們發現所製作的單極性元件與文獻所報導的結果一樣，都擁有非常不穩定操作的特性，而這個問題將會使得單極性元件無法被應用，我們也針對設置電壓不穩的問題提出學理上的可能原因以供後人解決此問題。而在研究雙極性元件的操作特性方面，所有的元件大致比單極性元件擁有較穩定的操作特性，特別是以Ti做為電極的氧化鉿元件，其元件的操作特性在元件縮小至次微米尺寸時大幅的增進，且成功的展示出低功率、高操作速度、不錯的可靠度與可多階操作等特點，而這些特點將有助於此元件取得下世代記憶體應用的資格。

The purpose of this thesis is to develop a reliable HfO2 based resistive memory for the next generation nonvolatile memory application. In order to find the process factor to determine the resistance switch, the effect of electrode metal and anneal process on the HfO2 based metal-insulator-metal capacitor are studied. The result suggests the free energy of oxidation reaction for an electrode metal not only affect the interaction between oxide and electrode, but also is critical to the operation mode of memory device. The electrode metal of less negative free energy of oxidation reaction tends to result in the unipolar resistive memory, whereas that with more negative free energy of oxidation reaction can result in the bipolar resistive memory with the help of anneal process. In this thesis, the uipolar HfO2 based resistive memory is realized with Ru electrode, while the bipolar HfO2 based resistive memory is realized with AlCu, Ti, Ta, TaN electrode. In the study of unipolar device, the Ru device, like others in literature, suffers the serious issue of operation instability, which suggests the difficulty for real application, and a plausible mechanism is proposed to explain the fluctuated SET voltage. In the study of bipolar device, these devices show better operation stability than unipolar device. Moreover, an aggressive improvement of memory performance was found in the device with Ti electrode as it is scaled down to submicron region. As the result, a highly reliable HfO2 based resistive memory is demonstrated with Ti electrode. Excellent memory performances, including low power, high speed, acceptable reliability and capability of multi-levels operation of this device promised it application in the next generation nonvolatile memory.

[1] International Technology Roadmap for Semiconductor (ITRS), 2007 edition.
[2] Y. Horii, Y. Hikosaka, A. Itoh, K. Matsuura, M. Kurasawa, G. Komuro, K.
Maruyama, T. Eshita, S. Kashiwagi, “4 Mbit embedded FRAM for high performance System on Chip (SoC) with large switching charge, reliable retention and high imprint resistance,” in IEDM Tech. Dig., pp. 539-542, 2002.
[3] J.H. Oh, J.H. Park, Y.S. Lim, H.S. Lim, Y.T. Oh, J.S. Kim, J.M. Shin, J.H. Park, Y.J. Song, K.C. Ryoo, D.W. Lim, S.S. Park, J.I. Kim, J.H. Kim, J. Yu, F. Yeung, C.W. Jeong, J.H. Kong, D.H. Kang, G.H. Koh, G.T. Jeong, H.S. Jeong, and Kinam Kim, “Full Integration of Highly Manufacturable 512Mb PRAM based on 90nm Technology,” in IEDM Tech. Dig., 2006.
[4] S. Tehrani, “Status and Outlook of MRAM Memory Technology,” in IEDM Tech. Dig., 2006.
[5] Byeong-Ok Cho, Takahiro Yasue, Hongsik Yoon, Moon-Sook Lee, In-Seok Yeo, U-In Chung, Joo-Tae Moon, Byung-Il Ryu, “Thermally Robust Multi-layer Non-Volatile Polymer Resistive Memory, ” in IEDM Tech. Dig., 2006.
[6] I. G. Baek, M. S. Lee, S. Seo, M. J. Lee, D. H. Seo, D. –S. Suh, J. C. Park, S. O. Park, H. S. Kim, I. K. Yoo, U-In Chung, and J. T. Moon, “Highly scalable non-volatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses,” in IEDM Tech. Dig., pp. 587-590, 2004.
[7] D. R. Lamb and P. C. Rundle, “A non-filamentary switching action in thermally grown silicon dioxide films, ” Br. J. Appl. Phys. 18, 29-32 (1967)
[8] T. W. Hickmott, “Low-frequency negative resistance in thin anodic oxide films,” J. Appl. Phys. 33, 2669–2682 (1962).
[9] W. W. Zhuang, W. Pan, B. D. Ulrich, J. J. Lee, L. Stecker, A. Burmaster, D. R. Evans, S. T. Hsu, M. Tajiri, A. Shimaoka, K. Inoue, T. Naka, N. Awaya, A. Sakiyama, A.; Y. Wang, S. Q. Liu, N. J. Wu, A. Ignatiev, “Novel colossal magnetoresistive thin film nonvolatile resistance random access memory (RRAM), ” in IEDM Tech. Dig., pp. 193-196, 2002.
[10] I. G. Baek, D. C. Kim, M. J. Lee, H. –J. Kim, E. K. Yim, M. S. Lee, J. E. Lee, S. E. Ahn, S. Seo, J. H. Lee, J. C. Park, Y. K. Cha, S. O. Park, H. S. Kim, I. K. Yoo, U. –In Chung, J. T. Moon and B. I. Ryu, “Multi-layer cross-point binary oxide resistive memory (OxRRAM) for post-NAND storage application,” in IEDM Tech. Dig., pp. 750-753,2005.
[11] A. Chen, S. Haddad, Y. –C. Wu, T. –N. Fang, Z. Lan, S. Avanzino, S. Pangrle, M. Buynoski, M. Rathor, W. Cai, N. Tripsas, C. Bill, M. VanBuskirk and M. Taguchi, “Non-volatile resistive switching for advanced memory applications,” in IEDM Tech. Dig., pp. 746-749, 2005.
[12] Y. Hosoi, Y. Tamai, T. Ohnishi, K. Ishihara, T. Shibuya, Y. Inoue, S. Yamazaki, T. Nakano, S. Ohnishi, N. Awaya, H. Inoue, H. Shima, H. Akinaga, H. Takagi, H. Akoh, Y. Tokura, “High Speed Unipolar Switching Resistance RAM (RRAM) Technology ” in IEDM Tech. Dig., 2006.
[13] K. Tsunoda, K. Kinoshita, H. Noshiro, Y. Yamazaki, T. Iizuka, Y. Ito, A. Takahashi, A. Okano, Y. Sato, Y. Fukano, M. Aoki, Y. Sugiyama, “Low Power and High Speed Switching of Ti-doped NiO ReRAM under the Unipolar Voltage Source of less than 3 V,” in IEDM Tech. Dig., pp. 767-770, 2007.
[14] Z. Wei, Y. Kanzawa, K. Arita, Y. Katoh, K. Kawai, S. Muraoka, S. Mitani, S. Fujii, K. Katayama, M. Iijima, T. Mikawa, T. Ninomiya, R. Miyanaga, Y. Kawashima, K. Tsuji, A. Himeno, T. Okada,R. Azuma, K. Shimakawa, H. Sugaya, and T. Takagi;R. Yasuhara, K.Horiba, H. Kumigashira, and M. Oshima, “Highly Reliable TaOx ReRAM and Direct Evidence of Redox Reaction Mechanism,” in IEDM Tech. Dig., pp. 293-296, 2008.
[15] Rainer Waser and Masakazu Aono, “Nanoionics-based resistive switching
memories,” Nature Materials, 6, 833-840, 2007.
[16] B. Gao, S. Yu, N. Xu, L.F. Liu, B. Sun, X.Y. Liu, R.Q. Han, J.F. Kang, B. Yu,Y.Y. Wang, “Oxide-Based RRAM Switching Mechanism: A New Ion Transport Recombination Model,” in IEDM Tech. Dig., pp. 563-566, 2008.
[17] N. Xu, B. Gao, L.F. Liu, Bing Sun, X.Y. Liu, R.Q. Han, J.F. Kang, and B. Yu, “A Unified Physical Model of Switching Behavior in Oxide-Based RRAM,” Symp. on VLSI Tech. Dig., pp. 100-101, 2008.
[18] U. Russo, D. Ielmini, C. Cagli, A. L. Lacaita, S. Spiga, C. Wiemer, M. Perego and M. Fanciulli, “Conductive-filament switching analysis and self-accelerated thermal dissolution model for reset in NiO-based RRAM,” in IEDM Tech. Dig., pp. 775-778, 2007.
[19] Myoung-Jae Lee, Youngsoo Park, Bo-Soo Kang, Seung-Eon Ahn, Changbum Lee, Kihwan Kim, Wenxu. Xianyu, G. Stefanovich, Jung-Hyun Lee, Seok-Jae Chung*, Yeon-Hee Kim, Chang-Soo Lee, Jong- Bong Park, In-Gyu Baek and In-Kyeong Yoo, “2-stack 1D-1R Cross-point Structure with Oxide Diodes as Switch Elements for High Density Resistance RAM Applications,” in IEDM Tech. Dig., pp. 771-775, 2007.
[20] M.-J. Lee, C. B. Lee, S. Kim, H. Yin, J. Park, S. E. Ahn, B. S. Kang, K. H. Kim, G. Stefanovich, I. Song, SW.Kim, J. H. Lee, S. J. Chung, Y. H. Kim, C. S. Lee, J. B. Park, I. G. Baek, C. J. Kim, Y. Park, “Stack Friendly All-Oxide 3D RRAM using GaInZnO Peripheral TFT realized over Glass Substrates,” in IEDM Tech. Dig., pp. 85-88, 2008.
[21] L.F. Liu, J.F. Kang, H. Tang, N. Xu, Y. Wang, X.Y. Liu, X. Zhang, R.Q. Han, “Gd doping improved resistive switching characteristics of TiO2-based resistive
memory devices,” in Ext. Abs. Int. Conf. Solid State Device and Materials (SSDM2007), pp. 836-837, 2007.
[22] D. C. Kim, M. J. Lee, S. E. Ahn, S. Seo, J. C. Park, I. K. Yoo, I. G. Baek, H. J.Kim, E. K. Yim, J. E. Lee, S. O. Park, H. S. Kim, U–In Chung, J. T. Moon, and B. I. Ryu, “Improvement of resistive memory switching in NiO using IrO2,” Appl. Phys. Lett., vol. 88, 232106, 2006.
[23] C. –Y. Lin, C. –Y. Wu, C. –Y. Wu, T. –C. Lee, F. –L. Yang, C. Hu and T. –Y Tseng, “Effect of top electrode material on resistive switching properties of ZrO2 film memory devices,” IEEE Electron Device Lett., vol. 28, pp. 366-368, 2007.
[24] Dongsoo Lee, Dong-jun Seong, Hye jung Choi, Inhwa Jo, R. Dong ,W. Xiang, ,Seokjoon Oh, Myeongbum Pyun, Sun-ok Seo, Seongho Heo, Minseok Jo, Dae-Kyu Hwang, H. K Park, M. Chang, M. Hasan, and Hyunsang Hwang, “Excellent uniformity and reproducible resistance switching characteristics of doped binary metal oxides for non-volatile resistance memory applications,” in IEDM Tech. Dig., 2006.
[25] S. Muraoka, K. Osano, Y. Kanzawa, S. Mitani, S. Fujii, K.Katayama, Y. Katoh, Z. Wei, T. Mikawa, K. Arita, Y. Kawashima, R. Azuma, K. Kawai, K. Shimakawa, A. Odagawa, and T. Takagi, “Fast switching and long retention Fe-O ReRAM and its switching mechanism,” in IEDM Tech. Dig., pp. 779-782, 2007
[26] K. Kinoshita, T. Tamura, M. Aoki, Y. Sugiyama, and H. Tanaka, “Bias polarity dependent data retention of resistive random access memory consisting of binary transition metal oxide,” Appl. Phys. Lett., vol. 89, 103509, 2006.
[27] S. B. Samavedam, L. B. La, J. Smith, S. Dakshina-Murthy, E. Luckowski, J, Schaeffer, M. Zavala, R. Martin, V. Dhandapani, D. Triyoso, H. H. Tseng, P. J. Tobin, D. C. Gilmer, C. Hobbs, W. J. Taylor, J. M. Grant, R. I. Hegde, J. Mogab, C. Thomas, P. Abramowitz, M. Moosa, J. Conner, J. Jiang, V. Arunachalarn, M. Sadd, B.-Y. Nguyen, B. White, “Dual-metal gate CMOS with HfO2 gate dielectric,” in IEDM Tech. Dig., pp. 433-436, 2002.
[28] Daewon Ha, H. Takeuchi, Y.-K. Choi, T.-J. King, W. P. Bai, D. L. Kwong, A. Agarwal, M. Ameen, “Molybdenum gate HfO2 CMOS FinFET technology,” in IEDM Tech. Dig., pp. 643-646, 2004.
[29] C. Hobbs, H. Tseng, K. Reid, B. Taylor, L. Dip, L. Hebert, R. Garcia, R. Hegde, J. Grant, J. Grant, D. Gilmer, A. Franke, V. Dhandapani, M. Azrak, L. Prabhu, R. Rai, S. Bagchi, J. Conner, S. Backer, F. Dumbuya, B. Nguyen, P. Tobin, “80 nm poly-Si gate CMOS with HfO2 gate dielectric,” in IEDM Tech. Dig., pp. 30.1.1-30.1.4, 2001.
[30] Jae Hyoung Choi, Jeong-Hee Chung, Se-Hoon Oh, Jeong Sik Choi, Cha-Young Yoo, Sung-Tae Kim, U-In Chung, Joo-Tae Moon, “New Approaches to Improve the Endurance of TiN/HfO2/TiN Capacitor During the Back-end Process for 70nm DRAM Device,” in IEDM Tech. Dig., pp. 28.3.1-28.3.4, 2003.
[31] Se-Hoon Oh, Jeong-Hee Chung, Jae-Hyoung Choi, Cha-Young Yoo, Young Sun Kim, Sung Tae Kim, U-In Chung, Joo Tae Moon, “TiN/HfO2/TiN capacitor technology applicable to70 nm generation DRAMs,” Symp. on VLSI Tech. Dig., pp. 73-74, 2003.
[32] J. H. Lee, K. Koh, N. I. Lee, M. H. Cho, Y. K. Ki, J. S. Jeon, K. H. Cho, H. S. Shin, M. H. Kim, K. Fujihara, H. K. Kang, J. T. Moon, “Effect of polysilicon gate on the flatband voltage shift and mobility degradation for ALD-Al2O3 gate dielectric,” in IEDM Tech. Dig., pp. 645-648, 2000.
[33] H. Seidl, M. Gutsche, U. Schroeder, A. Birner, T. Hecht, S. Jakschik, J. Luetzen, M. Kerber, S. Kudelka, T. Popp, A. Orth, H. Reisinger, A. Saenger, K. Schupke, B. Sell, “A fully integrated Al2O3 trench capacitor DRAM for sub-100nm technology,” in IEDM Tech. Dig., pp. 839-842, 2002.
[34] T. Suntola, J. Antson, US Patent 4,058,430, 1977.
[35] 電阻式記憶體薄膜沉積報告, 李亨元, 工業技術研究院技術資料報告, 513960122, 2007.
[36] 適合90nm DRAM電容蝕刻與製程整合驗證報告, 粱虔碩等, 工業技術研究院技術資料報告, 033940535, 2005.
[37] 電阻式記憶體蝕刻與製程整合報告, 吳岱原等, 工業技術研究院技術資料報告, 513960123, 2007.
[38] K. Kinoshita, K. Tsunoda, Y. Sato, H. Noshiro, S. Yagaki, M. Aoki, and Y. Sugiyama, “Reduction in the reset current in a resistive random access memory
consisting of NiOx brought about by reducing a parasitic capacitance,” Appl. Phys. Lett., vol. 93, 033506, 2008.
[39] 相變化記憶體Mb chip 1st cut設計報告, 林烈萩等, 工業技術研究院技術資料報告, 51395011001, 2006.
[40] G. Servalli, “A 45nm generation Phase Change Memory technology,” in IEDM Tech. Dig., 2009.
[41] U. K. Klostermann, M. Angerbauer, U. Griming, F. Kreupl, M. Ruhrig, F. Dahmani, M. Kund, G. Miller, “A perpendicular spin torque switching based MRAM for the 28 nm Technology node,” in IEDM Tech. Dig., pp. 187-190, 2007.
[42] Shyh-Shyuan Sheu, Pei-Chia Chiang, Wen-Pin Lin, Heng-Yuan Lee, Pang-Shiu Chen, Yu-Sheng Chen, Tai-Yuan Wu, Frederick T. Chen, Keng-Li Su, Ming-Jer Kao, Kuo-Hsing Cheng, Ming-Jinn Tsai, “A 5ns Fast Write Multi-Level Non-Volatile 1 K bits RRAM Memory with Advance Write Scheme,” Symp. on VLSI Tech. Dig., pp. 82-83, 2009.
[43] http://www.doitpoms.ac.uk/tlplib/ellingham_diagrams/interactive.php
[44] K. Kinoshita, H. Noshiro, C. Yoshida, Y. Sato, M. Aoki, and Y. Sugiyama, “A Proposal of a Parallel Resistance Model for the Conduction Mechanism of Binary Transition Metal Oxide ReRAM,” Mater. Res. Soc. Symp. Proc. 997, I07-09 (2007).
[45] J. Simmons, “Generalized Thermal J-V Characteristic for Electric Tunnel Effect,” J. Appl. Phys. 35, 2655 (1964).
[46] K. M. Kim, B. J. Choi, Y. C. Shin, S. Choi, and C. S. Hwang, “Anode-interface localized filamentary mechanism in resistive switching of TiO2 thin films,” Appl. Phys. Lett. 91, 012907 (2007).
[47] S. Zafar, C. Cabral, R. Amos, and A. Callegari, “A method for measuring barrier heights, metal work functions and fixed charge densities in metal/SiO2/Si capacitors,” Appl. Phys. Lett. 80 4858, (2002).
[48] S. Zafar, V. Narayanan, A. Callegari, .F. R. Mcfeely, P. Jamison, E. Gusev, C. Cabral, and R. Jammy, “HfO2/Metal Stacks: Determination of Energy Level diagram, Work Functions & their Dependence on Metal Deposition,” Symp. on VLSI Tech. Dig., pp. 44-45, 2005.
[49] E. Jelenkovic, and K. Y. Tong, “Thermally grown ruthenium oxide thin films,” J. Vac. Sci. Technol. B 22, 2319 (2004).
[50] R. Jha, B. Lee, B. Chen, S. Novak, P. Majhi, and V. Misra, “Dependence of PMOS Metal Work Functions on Surface Conditions of High-K Gate Dielectrics,” in IEDM Tech. Dig., pp. 43-46, 2005.
[51] B. J. Choi, D. S. Jeong, S. K. Kim, C. Rohde, S. Choi, J. J. Oh, H. J. Kim, C. S. Hwang, K. Szot, R. Waser, B. Reichenberg, and S. Tiedke, “Resistive switching mechanism of TiO2 thin films grown by atomic-layer deposition,” J. Appl. Phys. 98, 033715 (2005).
[52] M. A. Lampert and P. Mark, “Current injection in solids,” Academic Press, 1970.
[53] A. Odagawa, H. Sato, I. H. Inoue, H. Akoh, M. Kawasaki and Y. Tokura, “Colossal electroresistance of a Pr00.7Ca0.3MnO3 thin film at room temperature,” Phys. Rev. B, vol. 70, 224403, 2004.
[54] P. Majumder, R. Katamreddy, and C. Takoudis, “Atomic layer deposited ultrathin HfO2 and Al2O3 films as diffusion barrier in copper interconnection,” Electrochem. Solid-State Lett., vol 10, H291, 2007.