為了符合當前CMOS元件的發展方向，以及克服未來將面對到的瓶頸，在本論文中，我們提出了兩種不同的方式，用來作為提升元件特性的研究方案，其一為使用具有高介電常數的稀土族氧化元素結合結晶態高介電常數材料來提升元件的特性，其二為將稀土族氧化元素整合在具有高載子遷移率的鍺作為元件通道材料，而在實驗的第一個部份我們成功的使用介面層材料Yb2O3整合結晶態高介電常數材料ZrTiO4之堆疊結構當作矽電晶體的閘極介電層，在研究的成果中顯示出元件擁有相當不錯的次臨限擺幅，以及元件在高電場處仍有良好的載子遷移速率，這些性質都指出使用稀土族氧化元素Yb2O3作為介面層搭配結晶態高介電常數材料ZrTiO4這樣的堆疊方式形成的結構具有相當不錯的介面品質。另外一方面，在實驗的第二個部分由於高的載子遷移速率可以提升元件的驅動電流，因此我們以鍺基板為通道材料結合稀土族氧化元素Sm2O3作為介面鈍化層製作電容元件，在研究結果顯示元件擁有良好的頻散特性、低介面缺陷密度，展現出良好的介面品質，證實以Sm2O3作為鍺的介面層能夠有效地保護鍺的介面，且Sm2O3具有高的介電常數值，可將等效氧化層厚度有效的微縮至1nm以下。
綜合以上結果，我們認為結晶態高介電常數材料ZrTiO4結合稀土族氧化物介面層Yb2O3之堆疊結構作為矽電晶體之閘極氧化層材料以及使用Sm2O3整合在鍺基板兩個提昇元件特性的方向均具有相當大的研究運用空間。

In order to cater to the current direction of development of CMOS devices, in this paper, we propose two possible ways to improve device performance. In the first topic, we use rare earth oxides Yb2O3 combine with high dielectric constant crystalline materials ZrTiO4 as the gate dielectric to fabricate n- MOSFETs.Electrical characteristics show that the device has low EOT under 1nm, good subthreshold behavior, excellent high field mobility and small amount of interface trap density all indicate that the surface quality between Si and Yb2O3 is very promising.
In the second topic, the rare earth oxides Sm2O3 was proposed as the gate dielectric to fabricate Ge MOSCAPs. Electrical characteristics show that the device has low EOT, reasonable leakage current value, and small amount of interface trap density, suggest that the Ge surface was effective passivated by Sm2O3.
Based on the above results, we can conclude that using rare earth oxides Yb2O3 and Sm2O3 as the gate dielectric for both Si-MOSFET and Ge-MOSCAP have considerable potential.

第一章
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第三章

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