近年來，由於CMOS製程的發展和演進，微波積體電路在V頻段(40-75 GHz)與W頻段(75-110 GHz)的應用有顯著的成長。例如：應用於霧視系統之成像接收器陣列、影像傳輸系統之高資料傳輸速率接收機等。在無線通訊系統中，低雜訊放大器(LNA)為接收機之第一級電路，須要能放大訊號到足夠大小並且不增加額外雜訊。良好的低雜訊放大器設計目標，須要有以下的特性，如：足夠的增益(Gain)、低雜訊係數(Noise Figure)、良好的線性度、良好的輸入阻抗匹配與維持電路的穩定度。然而，在W頻段下，CMOS主被動元件之寄生電容、低崩潰電壓和低品質因數，使得電路設計有所困難。
此論文中，完成了三個實作在90-nm CMOS製程之低雜訊放大器，兩個應用於W頻段，最後一個應用於V頻段。第一個設計主要採用了輸入端的變壓器作為回授路徑，同時達到寬頻的輸入阻抗匹配與低雜訊係數。此設計達到6.5 GHz 的頻寬、在64GHz時增益可達16.1 dB、最低雜訊係數為10 dB、線性度IP1-dB度可達-18 dBm。第二個設計是第一個設計的改良版本。由於電路走線的方式不同，電磁模擬的環境設定與精準度同時會受到影響，為了改進第一個設計，而採用了極間變壓器設計，以取代原本極間所使用電容，並且同時優化了級間之阻抗匹配。此設計達到20 GHz 的頻寬、在76GHz時增益可達7.6 dB、最低雜訊係數為7.5 dB、線性度IP1-dB度可達-12 dBm。最後一個設計則採用了轉導提升(Gm-boosting)技術，在CMOS之閘級與源級間使用變壓器作為回授路徑，且第一、二級級間同時使用變壓器來做為阻抗匹配。此設計之模擬結果可達到10 GHz 的頻寬、在59GHz時增益可達9.6 dB、最低雜訊係數為5 dB、線性度IP1-dB度可達-12 dBm。

Due to the scaling of silicon technology, millimeter-wave (mm-wave) integrated circuits especially in W-band (75-110 GHz) and V-band (40-75 GHz) are widely explored in recent years. For example, a CMOS imaging receiver array for fog vision camera and security, and a CMOS transceiver for high-speed video streaming. In wireless communication systems, low noise amplifier (LNA) is the first block in the receiver to amplify the received weak signal with minimum noise added. A good LNA design requires a high gain, low noise figure, high linearity, good input-output matching, and stability. However, the designs of W-band front-end circuits in CMOS technology are challenging due to the transistor parasitic capacitance, the low breakdown voltage, and the quality of the on-chip passive devices.
This thesis presents two LNAs in W-band and one LNA in V-band in 90-nm CMOS. The first design is a W-band LNA with a shunt-series transformer feedback at the input to achieve a wideband input matching and low noise performance simultaneously. The first design achieves a 3-dB bandwidth of 6.5 GHz, a peak gain of 16.1 dB at 64 GHz, a minimum noise figure of 10 dB, and an input P1-dB of -18 dBm. The second work is an improved design of the first one. Physical layout is revised to improve the accuracy of the electromagnetic modeling. Inter-stage capacitors are substituted for inter-stage transformers for matching optimization. The second design achieves a wide 3-dB bandwidth of 20 GHz, a peak gain of 7.6 dB at 76 GHz, a minimum noise figure about 7.5 dB at 76 GHz, and an input P1-dB of -12 dBm. Lastly, a V-band LNA is proposed. The Gm-boosting technique is adapted in the first stage with a source-to-gate transformer to improve the voltage gain. The T-coil peaking feedback transformer is designed at the output of the first stage to enhance the inter-stage bandwidth. The shunt-series transformer in the inter-stage serves as the matching network to provide a wideband loading. The V-band design in simulation achieves a 3-dB bandwidth of 10 GHz, a peak gain of 9.6 dB at 59 GHz, a minimum noise figure of 5 dB at 59 GHz, and an input P1-dB of -12 dBm. All of the proposed amplifiers are designed by the minimum noise measure technique to optimize their performances. Ground shielding under the passive devices are used to minimize the substrate loss.

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