隨著製程的進步，大型機體電路快速進入次微米製程，冗餘接點的失敗導致整個積體電路的良率下降或是失敗會變得越來越重要。為了增進在大型積體電路製造時的良率以及可靠性的，製成公司強烈建議安插冗餘接點是必要的一項步驟。在我們的論文裡面，我們研究後端佈局冗餘接點安插問題，並且同時考慮最後佈局檔案的大小。我們有系統的將這一個問題轉換成最大重量獨立集合這一個問題，並且用一個經驗法則的解決方案，來解決這一個最大重量獨立集合問題。除此之外，因為在佈局檔案裡面會有描述許多的元件，這些元件有可能被呼叫好幾次，在呼叫的過程中可能會有翻轉以及旋轉這兩個動作，為了快速以及有效的知道哪些空間可以安插冗餘接點，我們必須知道在翻轉以及旋轉的前後方向上的關係，我們提出了一個表示方法，叫做方向序列。這一個方向序列可以快速查詢目前這上下左右這四個方向是在原本參考到冗餘接點的上下左右的哪個方向，進而知道哪些方向可以安插冗餘接點。實驗結果顯示，在大部份的測試例子裡面，我們的演算法可以安插最大數量的冗餘接點並且可以保持最後出來的佈局檔案大小，增加很少的空間，平均上來說，最後我們演算法產生的佈局檔案的大小是將佈局檔案攤平的檔案大小約是五分之一。

When the manufacturing processes of integrated circuits shrink to deep submicron technologies, loss of yield caused by via defects becomes more significant. In order to improve via yield and reliability, redundant via insertion is highly recommend by foundries. In this thesis, we study the post-layout redundant via insertion problem while considering the resultant GDSII file size. We formulate this problem as a maximum weighted independent set (MWIS) problem, and present a heuristic to solve the MWIS problem. Moreover, since the cells described in the GDSII file format can be instantiated by reflecting and rotating, for efficiently identifying the directions where some redundant vias can be inserted simultaneously, we propose the idea of direction sequence to quickly query the relationship between the direction relative to an original single via in a structure and the direction relative to a corresponding flattened single via. Experimental results show that for almost all test cases, our algorithm can insert the maximum numbers of redundant vias while keeping the resultant GDSII file sizes to have small increases. On average the size of a resultant GDSII file generated by our algorithm is one fifth of the size of the GDSII file which is flattened.

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