本論文的CMOS影像感測電路包括:
(1) 在陣列(array)，藉由陣列上相鄰列的電晶體導通時間不同，當每一行電晶體導通的同時，利用相鄰電晶體在截止區(cutoff region)的寄生電容(overlap capacitance)，提供光電流所需的儲存電容，取代傳統架構在陣列上所需的電容。同時也減少了重置(reset)和列選擇(row select)電晶體所需的電晶體個數，改善了整個陣列的填充係數(fill factor)，以達到縮小畫素(pixel)的面積。由於儲存電容是並連共用，所以也改善製程變異所造成的固定樣式雜訊(fixed pattern noise，FPN)。
(2) 在相關兩次取樣 (correlated double sampling，CDS)電路，改良型的CDS電路，藉由傳統的雙端輸出型CDS電路再多加入減法器，可消除同一行的像素彼此之間因製程變異，所造成的固定影像雜訊(FPN noise) ，並且在CDS電路的減法器，可以消除在CDS電路中電晶體製程變異所造成的差異，可以達到減低固定影像雜訊。
(3) 在不改變輸出訊號大小以及不減少曝光面積等前提下、採用調適性控制機制。藉由額外的像素來偵測照度的大小，自動調整放大器的增益。當照度過大時，減小放大器的增益，當照度小時，則增加放大器的增益，以擷取品質更佳的圖場。此外，在像素的輸出模式上，採用差動輸出模式，以去除雜訊干擾的方式，嘗試提昇影像感測器的動態範圍。
(4) 我們設計在影像接收端的感測器陣列就以黃金比例的陣列空間接收影像，可以簡化在傳送到顯示器的過程經過複雜的陣列空間轉換運算，使影像接收端和影像的輸出端都是用相同的陣列比例去做讀取。
(5) 我們設計一新型兩段式高動態範圍影像感測電路，將採光分為光強和光弱兩種模式，並做自動切換，在每個畫面捕捉前做一偵測，然後自動調整適當的模式，去控制每個畫素的閘級控制電壓，改變不同的放電時間常數，使影像接收有更好的灰度表現。

This paper presents a image sensor circuit for digital camera in 0.35um CMOS technology. Its purpose is to realize that detects circuits in a image sensor applied to the digital camera, and used to the image array to realizes (golden ratio) behavior of the image array, and used to a analog method to realize automatically gain control of image sensor circuits .

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