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研究生: 劉格志
Ke-Chih Liu
論文名稱: Multistacked Tunneling Oxide for Nonvolatile Nanocrystal Memory Application
疊層結構穿隧層應用於非揮發性奈米晶記憶體之特性研究
指導教授: 吳泰伯
Tai-Bor Wu
口試委員:
學位類別: 碩士
Master
系所名稱: 工學院 - 材料科學工程學系
Materials Science and Engineering
論文出版年: 2008
畢業學年度: 96
語文別: 英文
論文頁數: 103
中文關鍵詞: 疊層穿隧層奈米晶記憶體非揮發性
外文關鍵詞: multistack, tunneling oxide, nanocrystal memory, nonvolatile
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  • In recent years, Flash memory has been used extensively in digital storage devices, such as memory cards, USB storage device, MP3 audio player, and so on [11], [12]. Moreover, portable electrical products will demand even more nonvolatile memories with high density, fast programming / erasing speed, excellent endurance and retention characteristics. Based on these demand, the market of Flash memory will increase in a foreseeable future. However, poly-silicon floating gate in conventional Flash memory is suffered from the charge leakage through the local defect in tunneling oxide. Therefore, separated charge storage elements, such as nanocrystals embedded in MOSFET, i.e. nanocrystal memory, were studied extensively in recent years [1-5]. Moreover, to further improve the programming/erasing speed without sacrificing the retention performance, a concept of “nanocrystal memory embedded with asymmetric band engineering of tunneling oxide” is proposed in this work. We set up two series of experiments, one is the Au nanocrystal memory using SiO2-HfO2-Al2O3 (namely SHA) multistacked tunneling oxide, the other is the Au nanocrystal memory using Al2O3-HfO2-Al2O3 (namely AHA) multistacked tunneling oxide with different thickness variation. The results and discussion will be described in chapter 4 and chapter 5 in detail.

    In these experiments, high-κ thin films were deposited using atomic layer deposition (ALD) to make sure the uniformity of our films. Subsequently, Au thin films were deposited using RF sputtering, and then annealed in N2 ambiance at 500oC and 650oC for SHA and AHA, respectively. Moreover, to increase the voltage drop on tunneling oxide to further improve the programming/erasing efficiency, ALD-Al2O3 control oxide were used in this work. Finally, Pt top electrode and bottom electrode were capped to form the MOS capacitor structure.

    After the fabrication of devices were accomplished, C-V curve and retention characteristics were measured by HP 4285 LCR Precision Meter, I-V curve were measured using Keithley 4200, erasing speed were measured by connecting the Agilient 81110A pulse generator and HP 4285 LCR Precision Meter, and the microstructure analysis were accomplished by HRTEM images.


    Table of Content II List of figures V List of tables X Acknowledgements XI Chapter 1 Introduction 1 1.1 Abstract 1 1.2 Research Motivation 2 1.3 Thesis Organization 4 Chapter 2 Literature Review 5 2.1 Introduction of Semiconductor Memories 5 2.1.1 Volatile Memories 6 2.1.2 Nonvolatile Memories 10 2.2 Emerging Nonvolatile Memories 21 2.2.1 FeRAM (Ferroelectric Random Access Memory) 21 2.2.2 MRAM (Magnetic Random Access Memory) 24 2.2.3 PCRAM (Phase Change Random Access Memory) 25 2.2.4 RRAM (Resistive Random Access Memory) 26 2.2.5 SONOS (Silicon-Oxide-Nitride-Oxide-Semiconductor) 27 2.2.6 Nanocrystal Memory 28 2.3 Nanocrystal Memory 29 2.3.1 Basic Theory 29 2.3.2 Memory effects in nanocrystal memories 34 2.3.3 Metal Nanocrystal Memory 36 2.3.4 High-κ Gate Oxide for Memory Application 37 2.3.5 Band Engineering of Tunneling Oxide 39 Chapter 3 Methods and Experiments 41 3.1 Experimental details and procedures 41 3.1.1 Process flow 42 3.1.2 Analysis and measurements 47 Chapter 4 SHA tunneling oxide 49 4.1 Introduction 49 4.2 Results and discussion 52 4.2.1 Structural analysis 52 4.2.2 Charging effect in SHA nanocrystal memory 53 4.2.3 Hole injection efficiency 58 4.2.4 Current-Voltage characteristics 60 4.2.5 Charge retention characteristics 61 4.2.6 Comparison of SA tunneling oxide 64 4.3 Conclusion 67 Chapter 5 AHA tunneling oxide 68 5.1 Introduction 68 5.2 Results and discussions 71 5.2.1 Structural analysis 71 5.2.2 Charging effect 74 5.2.3 Hole injection efficiency (erasing efficiency) 79 5.2.4 Charge retention characteristics 84 5.3 Effect of band engineering with multi-stacked tunnel oxide 87 5.4 Comparison of SHA and AHA 95 5.5 Conclusion 97 References 98

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