研究生: |
陳俊晟 Jiung-Sheng Chen |
---|---|
論文名稱: |
改良式32-bit混沌虛擬亂數產生器–注入數位雜訊方法之研究 A 32-bit Chaos-Based Pseudo Random Number Generator by Injecting Digital Noise |
指導教授: |
張慶元
Tsin-Yuan Chang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2005 |
畢業學年度: | 93 |
語文別: | 英文 |
論文頁數: | 51 |
中文關鍵詞: | 亂數產生器 、重新植入種子 、混沌 |
外文關鍵詞: | Random Number Generator, reseed, NIST SP800-22, chaos |
相關次數: | 點閱:2 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
由於現今網際網路、通信系統及個人認證蓬勃發展,密碼學更顯重要,而在密過程中其中最重要的方塊莫過於亂數產生器。亂數產生器目前約概略分為真實亂數產生器(True Random Number Generator)和虛擬亂數產生器(Pseudo Random Number Generator)。
由於真實亂數產生器主要的亂數產生來源來自於類比電路環境上不可完全掌握的特點,使得它的不可預測性相當的好,但也由於它那無法完全掌握的特點,使得亂數品值上亦無法得到一個穩定的水準.。另種虛擬亂數產生器則是屬數位方式實現的亂數產生器,在選定一組具有良好統計上亂數特性的方程式後,由數位電路完整實現,好處在於整個亂數品值可預測且可掌握,但也因數位電路對環境的抗擾性高,一經啟動,將跟據所選方程式完全走向一個固定的(Deterministic)路徑,其被預測的機會將隨著被截取的亂數資料愈多而增高。更且,一個純數位式亂數產生器的統計上良好的亂數特性需由高精度的數位運算來實現,若然精度不夠,截斷式誤差(Truncation Error)將會造成亂數品值上的陡降。
綜合以上問題,本文提出了一個32-bit 混沌式數位亂數產生器。其中32-bit的運算精度對於生成一個好的亂數特性的亂數序列是不夠的,但藉由在“特定時間點”重新注入一個新的種子(Reseed),使其不僅僅補足了截斷式誤差對亂數品值的影響對於不可預測性也因為在亂數生成程中不斷改變其路徑的方式而提高。
在調整以上所提及之“特定時間”,對於亂數序列上0與1的產生機率可以精準的控制,且所重新注入的種子乃由自身內部改變某些最小顯著位元(Least Significant Bits)而產生,不需由外部注入。
Random number generator (RNG) is an important part of communication and protocols in cryptography. It generates the cryptography keys and initial numbers, and also could be used in any application that needs the random value. It is hard to define a good RNG design by the unpredictable character or by the statistical test result.
To be unpredictable, the analog RNG is chosen. However, the influence from different environments would cause uncontrollable quality of RNG. To be good in statistical test result, the digital RNG is chosen. Thus the random outputs are generated from the iterative computations of the chosen equation with good statistical feature, and the outputs are working on the deterministic curve. A good statistical result depends on the chosen equation and on the highly precise digital operation.
In this thesis, a chaos-based RNG for a shorter bit length of 32 in pure digital environment with pseudo noise influenced is proposed. Once the pre-decided timing (ranged from 600 to 800 in this work) arrives, some of the least significant bits would be set to fixed values called the pseudo noises and feedback to the chaos equation operated.
In the algorithm implemented, the proposed RNG would have the analog and digital feature simultaneously. By tuning the timing of reseeding, an acceptable quality of randomness is obtained without operating in hi-precise digital operation, exclusive-or gates or the parity filter to scramble the output.
[1] Tsoi, K.H., Leung, K.H. and Leong, P.H.W.; “Compact FPGA-based True and Pseudo Random Number Generators” Proc. of 11th IEEE Symp. on Field-Programmable Custom Computing Machines, April 2003, pp. 51-61.
[2] Petrie, C.S. and Connelly, J.A.; “A noise-based IC random number generator for applications in cryptography” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 47, No. 5, May 2000, pp. 615-621.
[3] Stojanovski, T. and Kocarev, L.; “Chaos-based random number generators-part I: analysis [cryptography]”; IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 48, No. 3, March 2001, pp. 281-288.
[4] Vasiltsov, I., Karpinskij, B. and Fedorov,; “A. Investigation of the statistical parameters of the LFSR quasi-random generator” Proc. of the Int’l Conf. on Modern Problems of Radio Engineering, Telecommunications and Computer Science, Feb. 2002, pp. 168-169.
[5] Mita, R., Palumbo, G., Pennisi, S. and Poli, M.; “A novel pseudo random bit generator for cryptography applications”; Proc. of 9th Int’l Conf. on Electronics, Circuits and Systems, Vol. 2, Sept. 2002, pp. 489-492.
[6] Ott, Edward, “Chaos in dynamical systems”, Cambridge University Press, 2nd Ed., NY, 2002.
[7] Menezes, Alfred J., Oorschot, Paul C. van and Vanstone, Scott A.; “Handbook of applied cryptography” CRC Press, c1997.
[8] Huang, Zhun, and Chen, Hongyi,; “A truly random number generator based on thermal noise” Proc. of 4th Int’l Conf. on ASIC, 2001. Oct. 2001, pp. 862-864.
[9] Bucci, M., Germani, L., Luzzi, R., Trifiletti, A. and Varanonuovo, M.; “A high-speed oscillator-based truly random number source for cryptographic applications on a smart card IC” IEEE Transactions on Computers, Vol. 52, Issue 4, April 2003, pp. 403-409.
[10] Stefanou, N. and Sonkusale, S.R.; “High speed array of oscillator-based truly binary random number generators” Proc. of Int’l Symp. on Circuits and Systems, ISCAS, Vol. 1, May 2004, pp. I. 505-8.
[11] Yu, J., Shen, H.B. and Yan, X.L.; “Implementation of a chaos-based, high-speed truly random number generator” Proc. of 5th Int’l Conf. on ASIC, Vol. 1, Oct. 2003, pp. 526-529.
[12] Petrie, C.S. and Connelly, J.A.; “Modeling and simulation of oscillator-based random number generators” Proc. of Int’l Symp. on Circuits and Systems, ISCAS, Vol.4, May 1996, pp. 324-327.
[13] Yalcin, M.E., Suykens, J.A.K. and Vandewalle, J.; “True random bit generation from a double-scroll attractor” IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 51, Issue 7, July 2004, pp. 1395-1404.
[14] National Institute of Standards and Technology, “Security Requirements for Cryptographic Modules”, FIPS PUB 140-2, May 25, 2001.
[15] Rukhin, A., Soto, J., Nechvatal, J., Smid, M., Barker, E., Leigh, S., Levenson, M., Vangel, M., Banks, D., Heckert, A., Dray, J. and Vo, S.; “A Statistical Test Suite for Random and Pseudorandom Number generators for Cryptographic Applications,” NIST Special Publication 800-22, 2001.
[16] Soto, J.; “Statistical Testing of Random Number Generators” http://csrc.nist.gov/rng/nissc-paper.pdf , October, 1999.
[17] National Institute of Standards and Technology, “Security Requirements for Cryptographic Modules”, FIPS PUB 140-1, January 4, 1994.
[18] Lee, D.U.; Luk, W., Villasenor, J. and Cheung, P.Y.K.; “A hardware Gaussian noise generator for channel code evaluation” Proc. of 11th IEEE Symp. on Field-Programmable Custom Computing Machines, April 2003, pp. 69-78.