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研究生： 陸奇達
Chi-Ta Lu
論文名稱： 影像處理技術為基礎之空間性缺陷圖樣辨識演算法
Defect Spatial Pattern Recognition Algorithm Based on Image Processing Techniques
指導教授： 陳飛龍博士
Fei-Long Chen
口試委員:
學位類別： 碩士
Master
系所名稱： 工學院 - 工業工程與工程管理學系
Department of Industrial Engineering and Engineering Management
論文出版年： 2005
畢業學年度： 93
語文別： 英文
論文頁數： 120
中文關鍵詞： 半導體 、良率 、缺陷 、影像處理技術
外文關鍵詞： Semiconductor, Yield, Defect, Image processing techniques
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    • 半導體的製造需經過許多繁複的程序以及昂貴的原物料才能完成，若沒有及時解決良率低落的問題，會造成半導體公司嚴重的損失，但要從複雜的製造程序中找到原因是非常不容易的，因此為了縮短診斷製程問題的時間並有效的提昇半導體生產良率，半導體公司需要一套分析方法來找到造成良率低落的原因。

    製程的問題造成良率低落，而缺陷圖上的空間性缺陷圖樣和製程的問題有著密不可分的關係，因此空間性缺陷圖樣提供工程師找到造成良率低落的重要線索，本研究欲發展一套以影像處理技術為基礎的空間性缺陷圖樣辨識演算法，研究的目的包括 (1)辨識直線型、弧型、半環型、環型、邊緣型、重複型與區域型缺陷圖樣，(2)發展高執行速度的辨識方法，(3)同時處理位於缺陷圖上不同位置的缺陷圖樣，以及(4)缺陷分類準則標準化。辨識演算法的流程包括偵測重複型缺陷、缺陷雜訊過濾、缺陷分群、特徵擷取以及模糊推論系統，本研究亦建立知識庫存放資深工程師辨識缺陷圖樣的準則，做為辨識缺陷的標準。

    研究中收集了某一半導體中實際的缺陷資料，並建立系統以驗證辨識演法之可行性，以實例驗證結果而言，本研究提出的演算法可以正確的辨識出缺陷空間群聚圖樣，相較於人工辨識，高執行速度的優點可縮短缺陷辨識的時間。

    Semiconductor manufacturing is a large scaled process with high complexity. It is a very difficult task to identify the cause of product defects occurred during the manufacturing processes. In order to meet the expectation of a high yield target, quick identification of root cause becomes a vital issue. This means manufacturers must develop a method that enables them to improve yield as fast as they can after production starts. Spatial patterns appearing on the defect map contain information about defect shape and size, and might reveal the root causes of the occurred defects. As a result, this research intends to develop a defect spatial pattern recognition algorithm based on image processing techniques. The objectives of this research are (1) to accurately identify defect spatial patterns, including line type, curve type, half-ring type, ring type, edged type, repeating type and zone type, (2) to develop a recognizing procedure with high processing speed, (3) to deal with multiple defect patterns on a wafer simultaneously regardless of the wafer size, and (4) to standardize the defect classification. The recognition procedure includes the detection of repeating defects, defects denoising, defects clustering, feature extracting, and the fuzzy inference system. A knowledge base will also be built up based on the expertise accumulated from the regular recognition process.

    The developed methodology is verified with industrial data from a famous semiconductor company. The experimental results demonstrate that the proposed methodology can not only meet a high accuracy target but also save much time on dealing with the defect classification comparing to human operations.

    CONTENTS ABSTRACT I ABSTRACT(CHINESE) II ACKNOWLEDGEMENT III CONTENTS IV LIST OF TABLES VI LIST OF FIGURES VII LIST OF APPENDIXES IX CHAPTER 1 INTRODUCTION 1 1.1 RESEARCH BACKGROUND 1 1.2 RESEARCH MOTIVATION 2 1.3 RESEARCH OBJECTIVE 5 1.4 RESEARCH METHODOLOGY 6 1.5 FRAMEWORK OF THESIS 9 CHAPTER 2 LITERATURE REVIEW 10 2.1 INTRODUCTION OF SEMICONDUCTOR MANUFACTURING 10 2.2 THE DISCUSSION OF DEFECTS 15 2.2.1 The Definition of Particles, Defects, and Faults 15 2.2.2 The Classification of Defect 16 2.3 DEFECT ANALYSIS 18 2.3.1 Statistical Methods 18 2.3.2 Neural-Network Approach 21 2.3.3 Digital Image Processing Approach 23 2.4 DIGITAL IMAGE PROCESSING 29 2.4.1 Introduction to Imaging Processing 29 2.4.2 Application of Digital Image Processing in Semiconductor Industry 39 2.5 CLUSTERING METHODOLOGY 40 2.6 FUZZY INFERENCE SYSTEM 44 2.6.1. Membership Function 45 2.6.2. Fuzzy Logic Operators 46 2.6.3. Process of Fuzzy Inference System 46 CHAPTER 3 THE DEVELOPMENT OF THE DEFECT SPATIAL PATTERN RECOGNITION ALGORITHM 49 3.1 ARCHITECTURE OF THE PROPOSED ALGORITHM 51 3.1.1 Problem Definition 51 3.1.2 Architecture of the Proposed Algorithm 52 3.2 THE DEFECT SPATIAL PATTERN RECOGNITION ALGORITHM 56 3.2.1 Defects Denoising 56 3.2.2 Defects Clustering 62 3.2.3 Feature Extracting 67 3.2.4 Fuzzy Inference System 74 3.2.5 Detection of Repeating Type 80 3.3 CONSTRUCTION OF KNOWLEDGE BASE 82 CHAPTER 4 SYSTEM IMPLEMENTATION AND VERIFICATION 84 4.1 ARCHITECTURE OF THE DEVELOPED SYSTEM 84 4.2 OUTLINE OF THE DEVELOPED SYSTEM 86 4.2.1 Defect Patterns Recognition 86 4.2.2 Knowledge Base 90 4.2.3 Configuration 91 4.3 SYSTEM VERIFICATION 93 4.3.1 Performance of Recognizing Clustered Defects 93 4.3.2 Performance of Recognizing Repeating Defects 101 4.3.3 Processing Time 102 4.4 DISCUSSION 103 CHAPTER 5 CONCLUSION AND FURTHER RESEARCH 105 5.1 SUMMARY 105 5.2 FURTHER INVESTIGATION 108 REFERENCES 110 APPENDIX I 114 APPENDIX II 119

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