為縮小通訊高頻元件體積，整合主動與被動元件是未來的技術趨勢。主動元件主要使用低電阻率的矽晶圓，然而在微波頻率下低電阻率的矽晶圓會對電感造成嚴重的能量損耗而使電感的品質因子降低，因此本研究重點在於提升電感元件之品質因子與電感值密度。為降低基材損耗提升品質因子，本研究採用包含增加介電材料的厚度，使用低介電常數的材料與懸空結構，以及加大電鍍銅膜厚度來降低導線的串聯電阻等方式;而在微型電感結構設計方面，則包括各種平面與懸空螺旋電感與螺線管電感結構等。由於電感幾何形狀對其高頻特性有相當大的影響，因此本研究亦設計不同尺寸的電感並且研究尺寸變化對高頻特性的影響。另外，傳統提升電感元件的電感值密度方式主要為增加電感的圈數，然而增加電感的圈數雖然可以提升電感值密度但卻同時增加了面積與基板寄生效應。雙層電感的架構雖可提升電感感值密度，但因層與層之間的寄生電容將導致較低的電感品質因子，因此製作大層間距之雙層懸空電感，除可有效降低層間的寄生電容提升品質因子外也可以提升其電感值密度。另ㄧ種提升電感感值密度的方式則是將磁性材料與電感整合，雖然加入磁性材料會使電感元件的電阻增加而降低電感的品質因子，但是卻可以有效的提升其電感值。由於加入磁性材料並不會增加電感的面積，因此可以增加其電感值密度並節省元件面積。除了改進電感的效能之外，另一個值得研究的領域為建立適當的元件電路模型來預測電感元件的效能，在此採用ㄧ螺旋形電感測試結構的等效電路模型，以數值分析的方式配合電感的尺寸與材料參數預測方形或圓形螺旋形電感的品質因子與電感值。此外，在螺線管結構電感方面，則提出一等效電路模型，單純利用材料參數與電感的幾何結構參數來計算螺線管電感的品質因子與電感值。

In order to reduce the size of high-frequency communication devices, the general technology trend is to integrate both the active and passive components in the same substrate. The active components are generally fabricated on low resistivity silicon substrate. However, silicon-based on-chip inductors usually suffer serious quality factor degradation at high frequency due to capacitive coupling in silicon substrates. Therefore, the goal of the study is to focus on how to improve the quality factor and inductance density of Si-based inductors. In order to reduce inductor’s substrate loss, we use thick low-k dielectric or air-bridge technology to isolate the silicon substrate as well as thick electroplating copper to reduce the series resistance of the inductor. Since the inductance and quality factor also depend on the dimensions of inductors, we have designed inductors with various dimensions to study the relationship between inductors’ properties and their physical dimensions. For conventional planar spiral inductors, the way to raise the inductance-to-area ratio is to increase the number of metal turns. However, the cost to be paid is the increased parasitic capacitance and the reduced quality factor of the spiral inductors. A double-level inductor fabricated by standard integrated circuits technology has been proposed to increase the inductance density. Nevertheless, it has low quality factor mainly due to the severe parasitic capacitance between conductor levels. Therefore, we fabricate double-level suspended inductors with large inter-level spacing, which can effectively reduce the parasitic capacitance and result in high quality factor. The other way to enhance inductance density is to integrate magnetic materials with inductors. Although inductors with magnetic materials have better inductance, they have a decreased quality factor due to the increasing series resistance. In addition to the inductor’s property enhancement, an appropriate device circuit model for predicting inductor’s properties is also important. One approach employed here is to utilize a data fitting technique to obtain the series inductance and resistance values of a spiral inductor. The other equivalent circuit components are calculated from the materials properties and physical dimensions of the inductor. Therefore, the designers would be able to determine quickly the inductor properties of the spiral inductors of interests from the results of the limited tested structures. The other inductor’s physical model is devised for simulating the properties of solenoid inductors. All the inductive, resistive, and capacitive equivalent circuit elements can be correlated to the physical parameters and material properties of the solenoid inductors.

[1] M. J. Yu, H. H. Wu, and Y. J. Chan, “900 MHz/1.8GHz thin-film microwave bandpass filter,” in Asia Pacific Microwave Conf., 1999, pp. 686-689.
[2] E. C. Park, S. H. Baek, T. S. Song, J. B. Yoon, and E. Yoon, “Performance comparison of 5GHz VCOs integrated by CMOS compatible high Q MEMS inductors,” in IEEE MTT-S Int. Microwave Symp. Dig., 2003, pp. 721-724.
[3] Y. E. Chen, Y. K. Yoon, J. Laskar, and M. Allen, “A 2.4GHz integrated CMOS power amplifier with micromachined inductors,” in IEEE MTT-S Int. Microwave Symp. Dig., 2001, pp. 523-526
[4] J. W. M. Rogers, V. Levenets, C. A. Pawlowicz, N. G. Tarr, T. J. Smy, and C. Plett, “Post-processed Cu inductors with application to a completely integrated 2-GHz VCO,” IEEE Trans. Electron Devices, vol. 48, pp. 1284-1287, June 2001.
[5] C. H. Chen, Y. K. Fang, C. W. Yang, and C. S. Tang, “A deep submicron CMOS process compatible suspending high-Q inductor,” IEEE Electron Device Lett., vol. 22, pp. 522-523, Nov. 2001.
[6] W. Y. Yin, S. J. Pan, and L.W. Li, “Comparative characteristics of on-chip single- and double-level square inductors,” IEEE Trans. Magn., vol. 39, pp. 1778–1783, May 2003.
[7] T. S. Kim, K. Suezawa, M. Yamaguchi, K. I. Arai, Y. Shimada and C. O. Kim, “Properties of high resistivity CoPdAlO film for possibility of application to RF integrated inductor,” IEEE Trans. Magn., vol. 37, pp. 2255–2257, July 2001.
[8] J. Zhao, J. Zhu, Z. Chen and Z. Liu “Radio-frequency planar integrated inductor with permalloy-SiO2 granular films,” IEEE Trans. Magn., vol. 41, pp. 2334–2338, Aug. 2005.
[9] T. Kuribara, M. Yamaguchi and K. I. Arai, “Equivalent circuit analysis of an RF integrated ferromagnetic inductor,” IEEE Trans. Magn., vol. 38, pp. 3159–3161, Sept. 2002.
[10] C. Yang, F. Liu, T. Ren, L. Liu, H. Feng, A. Z. Wang, H. Long, “Fully integrated ferrite-based inductors for RF ICs,” Sensors and Actuators A, vol. 1, pp. 895–898, June 2005.
[11] C. P. Yue, C. Ryu, J. Lau, T. H. Lee, and S. S. Wong, “A physical model for planar spiral inductors on silicon,” in IEDM Tech. Dig., 1996, pp 155-158
[12] X. Huo, K. J. Chen, and P. C. H. Chan, “Silicon-based high-Q inductors incorporating electroplated copper and low-k BCB dielectric,” IEEE Electron Device Lett., vol. 23, pp. 520-522, Sep. 2002.
[13] J. N. Burghartz, M. Soyuer, K. A. Jenkins, and M. D. Hulvey, “High-Q inductors in standard silicon interconnect technology and its application to an integrated RF power amplifier,” in IEDM Tech. Dig., 1995, pp. 1015-1017.
[14] J. B. Yoon, B. K. Kim, C. H. Han, E. Yoon, and C. K. Kim, “Surface micromachined solenoid on-si and on-glass inductors for RF applications,” IEEE Electron Device Lett., vol. 20, pp. 487-489, Sep. 1999.
[15] Y. J. Kim and M. G. Allen, “Surface micromachined solenoid inductors for high frequency applications,” IEEE Trans. Comp. Packag. and Manufact. Technol. C, vol. 21, pp. 26-33, Jan. 1998.
[16] H. Jiang, Y. Wang, J. L. A. Yeh, and N. C. Tien, “On-chip spiral inductors suspended over deep copper-lined cavities,” IEEE Trans. Microw. Theory Techn., vol. 48, pp. 2415-2423, Dec. 2000.
[17] J. B. Yoon, Y. S. Choi, B. I. Kim, Y. Eo, and E. Yoon, “CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs,” IEEE Electron Device Lett., vol. 23, pp. 591-593, Oct. 2002.
[18] J. Sun and J. Miao, “High performance MEMS inductors fabricated on localised and planar thick SiO2 layer,” Electronics Lett., vol. 41, pp. 446-447, Mar. 2005.
[19] K. Chong, Y. H. Xie, K. W. Yu, D. Huang, and M. C. F. Chang, “High-performance inductors integrated on porous silicon,” IEEE Electron Device Lett., vol. 26, pp. 93-95, Feb. 2005.
[20] C. Liao, T. H. Huang, C. Y. Lee, D. Tang, S. M. Lan, T. N. Yang, and L. F. Lin, “Method of creating local semi-insulating regions on silicon wafers for device isolation and realization of high-Q inductors,” IEEE Electron Device Lett., vol. 19, pp. 461-462, Dec. 1998.
[21] C. H. Chen, Y. K. Fang, C. W. Yang, and C. S. Tang, “A deep submicron CMOS process compatible suspending high-Q inductor,” IEEE Electron Device Lett., vol. 22, pp. 522-523, Nov. 2001.
[22] C. S. Lin, Y. K. fang, S. F. Chen, C. Y. Lin, M. C. Hsieh, C. M. Lai, T. H. Chou, and C. H. Chen, “A deep submicrometer CMOS process compatible high-Q air-gap solenoid inductor with laterally laid structure,” IEEE Electron Device Lett., vol. 26, pp. 160-162, Mar. 2005.
[23] H. Ronkainen, H, Kattelus, E. Tarvainen, T. Riihisaari, M. Andersson, P. Kuivalainen, “IC compatible planar inductors on silicon,” in IEE Proc. Circuits, Devices & Systems, 1997, pp. 29-35.
[24] A. C. Watson, D. Melendy, P. Francis, K. Hwang, and A. Weisshaar, “A comprehensive compact-modeling methodology for spiral inductors in silicon-based RFICs,” IEEE Trans. Microw. Theory Techn., vol. 52, pp. 849-857, Mar. 2004.
[25] S. S. Mohan, M. D. M. Hershenson, S. P. Boyd and T. H. Lee, “Simple accurate expressions for planar spiral inductances,” IEEE J. Solid-State Circuits, vol. 34, pp. 1419-1424, Oct. 1999.
[26] H. M. Greenhouse, “Design of planar rectangular microelectronic inductors,” IEEE Trans. PHP, vol. 10, pp. 101-109, Jun. 1974.
[27] J. C. Maxwell, “A treatise on electricity and magnetism,” Clarendon, 1998.
[28] F. W. Grover, “Inductance calculations,” New York, D. Van Nostrand, 1946.
[29] K. O, “Estimation methods for quality factors of inductors fabricated in silicon integrated circuit process technologies,” IEEE J. Solid-State Circuits, vol. 33, pp. 1249-1252, Aug. 1998.
[30] J. Craninckx and M. S. J. Steyaert, “A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors,” IEEE J. Solid-State Circuits, vol. 32, pp. 736-744, May 1997.
[31] C. B. Sia, K. S. Yeo, M. A. Do and J. G. Ma, “Metallization proximity studies for copper spiral inductors on silicon,” IEEE Trans. Semiconductor Manufacturing, vol. 16, pp. 220-227, May 2003.
[32] C. P. Yue and S.S. Wong, “Physical modeling of spiral inductors on silicon,” IEEE Trans. Electron Devices, vol. 47, pp. 560-568, Mar. 2000.
[33] R. A. Pucel, D. J. Masse and C. P. Hartwig, “Losses in microstrip,” IEEE Trans. Microwave Theory Tech., vol. 16, pp. 342-350, Jun. 1968.
[34] R. F. Dana and Y. L. Chow, “The current distribution and AC resistance of a microstrip structure,” IEEE Trans. Microw. Theory Techn., vol. 38, pp. 1268-1277, Sep. 1990.
[35] Y. S. Choi and J. B. Yoon, “Experimental analysis of the effect of metal Thickness on the quality factor in integrated spiral inductors for RF ICs,” IEEE Electron Device Lett., vol. 25, pp. 76-79, Feb. 2004.
[36] P. J. Bell, N. D. Hoivik, R. A. Saravanan, N. Ehsan, V. M. Bright and Z. Popovic, “Flip-chip-assembled air-suspended inductors,” IEEE Trans. Advanced Packaging, vol. 30, pp. 148-154, Feb. 2007.
[37] W. B. Kuhn and N. M. Ibrahim, “Analysis of current crowding effects in multiturn spiral inductors,” IEEE Trans. Microw. Theory Techn., vol. 49, pp. 31-39, Jan. 2001.
[38] Y. K. Koutsoyannopoulos and Y. Papananos, “Systematic analysis and modeling of integrated inductors and transformers in RF IC Design,” IEEE Trans. Circuits and Systems-II, vol. 47, pp. 699-713, Aug. 2000.
[39] A. M. Nihnejad and R. G. Meyer, “Analysis of eddy-current losses over conductive substrates with applications to monolithic inductors and transformers,” IEEE Trans. Microw. Theory Techn., vol. 49, pp. 166-176, Jan. 2001.
[40] T. S. Kim, K. Suezawa, M. Yamaguchi, K. I. Arai, Y. Shimada and C. O. Kim, “Properties of high resistivity CoPdAlO film for possibility of application to RF integrated inductor,” IEEE Trans. Magn., vol. 37, pp. 2255–2257, July 2001.
[41] K. H. Kim, D. W. Yoo, J. H. Jeong, J. Kim, S. H. Han and H. J. Kim, “Dual spiral sandwiched magnetic thin film inductor using Fe–Hf–N soft magnetic films as a magnetic core,” J. Magn. Magn. Mater., vol. 239, pp. 579-581, 2002.
[42] M. Yamaguchi, K. H. Kim and S. Ikedaa, “Soft magnetic materials application in the RF range,” J. Magn. Magn. Mater., vol. 304, pp. 208-213, 2006.
[43] M. Yamaguchi, K. Suezawa, K. I. Arai, Y. Takahashi, S. Kikuchi, Y. Shimada, W. D. Li, S. Tanabe and K. Ito, “Microfabrication and characteristics of magnetic thin-film inductors in the ultrahigh frequency region,” J. Appl. Phys., vol. 85, pp. 7919-7922 , June 1999.
[44] I. Kim, J. Kim, K. H. Kim and M. Yamaguchi, “Effects of boron contents on magnetic properties of Fe-Co-B thin films,” IEEE Trans. Magn., vol. 40, pp. 2706–2708, July 2004.
[45] M. Yamaguchi, S. Bae, K. H. Kim, K. Tan, T. Kusumi and K. Yamakawa, “Ferromagnetic RF integrated inductor with closed magnetic circuit structure,” in IEEE MTT-S Int. Microwave Symp. Dig., June 2005, pp. 351-354.
[46] C. P. Yue and S. S. Wong, “On-chip spiral inductors with patterned ground shields for Si-based RF IC’s,” IEEE J. Solid-State Circuits, vol. 33, pp. 743-752, May 1998.
[47] Y. S. Choi, E. Yoon and J. B. Yoon, “Encapsulation of the micromachined air-suspended inductors,” in IEEE MTT-S Int. Microwave Symp. Dig., June 2003, pp. 1637-1640.
[48] K. J. Chen, W. C. Hon, J. Zhang and L. L. W. Leung, “CMOS-compatible micromachined edge-suspended spiral inductors with high Q-factors and self-resonance frequencies,” IEEE Electron Device Lett., vol. 25, pp. 363-365, June 2004.
[49] I. Zine-el-abidine and M. Okoniewski, “CMOS-compatible micromachined toroid and solenoid inductors with high Q-factors,” IEEE Electron Device Lett., vol. 28, pp. 226-228, Feb. 2007.
[50] H. Sagkol, S. Sinaga, J. N. Burghartz, B. Rejaei and A. Akhnoukh, “Thermal effects in suspended RF spiral inductors,” IEEE Electron Device Lett., vol. 26, pp. 541-543, Aug. 2005.
[51] R. P. Ribas, J. Lescot, J. L. Leclercq, J. M. Karam and F. Ndagijimana, “Micromachined microwave planar spiral inductors and transformers,” IEEE Trans. Microw. Theory Techn., vol. 48, pp. 1326-1335, Aug. 2000.
[52] J. D. Madden and I. W. Hunter, “Three-dimensional microfabrication by localized electrochemical deposition,” J. Microelectromechanical Systems, vol. 5, pp. 24-32, Mar. 1996.