簡易檢索 / 詳目顯示

研究生: 黃韋綸
Wei-Lun Huang
論文名稱: 可容錯之連續微流體生物晶片從結構層級快速合成
Fast Architecture-Level Synthesis of Fault-Tolerant Flow-Based Microfluidic Biochips
指導教授: 何宗易
Tsung-Yi Ho
口試委員: 黃俊達
Juinn-Dar Huang
陳宏明
Hung-Ming Chen
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Computer Science
論文出版年: 2016
畢業學年度: 105
語文別: 英文
論文頁數: 31
中文關鍵詞: 微流體生物晶片可容錯
外文關鍵詞: Biochips
相關次數: 點閱:2下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 微流體生物晶片(microfluidic biochip)已經成為了非常受歡迎的新興科技,它可以執行各式生物診斷和實驗在一塊晶片上。使用微流體
    生物晶片有許多好處,像是減少使用試劑的計量、較少人為出錯的
    可能性、較快的反應速度、以及較高的產出等。然而在微流體生物
    晶片的製造或實驗的過程中,有可能會損壞晶片本身,使用損壞的
    晶片將會浪費昂貴的試劑,更可怕的是安全上的疑慮,像是癌症診
    斷出錯。因次,我們決定要對連續型微流體生物晶片增加可容錯
    性,既使出現了一些常見的錯誤仍可正確運作。今年初有一篇論文
    也在研究這個題目,但是他的方法是基於退火演算法(simulated
    annealing (SA))去合成微流體生物晶片,此方法非常耗時又容易得到
    一個並不是很好的結果。因此我們提出一個逐步優化演算法來處理
    這個問題,實驗數據指出我們能比前者平均快約88%的執行時間。


    Microfluidic-based lab-on-a-chips have emerged as a popular technology for implementation
    of di erent biochemical test protocols used in medical diagnostics. However, in the
    manufacturing process or during operation of such chips, some faults may occur that leads
    to damage of the chip, which in turn results in wastage of expensive reagent fluids. In order
    to make the chip fault-tolerant, the state-of-the-art technique adopts simulated annealing
    (SA) based approach to synthesize a fault-tolerant architecture. However, the SA method
    is time consuming and non-deterministic with over-simplified model that usually derive
    sub-optimal results. Thus, we propose a progressive optimization procedure for the synthesis
    of fault-tolerant flow-based microfluidic biochips. Simulation results demonstrate that
    our method is ecient compared to the state-of-the-art techniques and can provide e ective
    solutions in 88% (on average) less CPU time compared to state-of-the-art technique over
    three benchmark bioprotocols.

    Contents Acknowledgement i Abstract ii 1 Introduction 1 1.1 Microfluidic biochips . . . 1 1.2 Continuous-flow based microfluidic biochips . . . 2 1.3 Ourwork . . . 2 1.4 Main Results . . . 3 2 PreliminaryWork 5 2.1 Background . . . 5 2.2 Prior Work . . . 7 2.2.1 Fault Model . . . 7 2.2.2 Fault Scenarios . . . 7 2.2.3 Fault-Tolerant Components . . . 8 2.2.4 System Model . . . 10 3 Motivation and Problem Formulation 12 3.1 Motivation . . . 12 3.2 Problem Formulation . . . 12 4 Algorithm 14 4.1 Fault-Tolerant Architecture-Level Synthesis . . . 14 4.1.1 Handle Channel Faults . . . 14 4.1.2 Handle Valve Faults . . . 15 4.2 Path Finding . . . 18 4.3 Constrained Path Finding . . . 19 4.4 Duplication . . . 21 4.5 Detouring . . . . 22 4.6 Replace with FT-Component . . . 23 4.7 Estimate the Execution Time . . . 24 5 Experiment 25 5.1 Simulation Results . . . 25 6 Conclusion 28 Reference 29

    [1]Je rey M Perkel. Life science technologies: microfluidics - bringing new things to life
    science. Science, Volume:322, Number:5903, pages 975–977, 2008
    [2] Daniel Mark, Stefan Haeberle, and G¨unter Roth, Felix von Stetten, Roland Zengerle.
    Microfluidic lab-on-a-chip platforms: requirements, characteristics and applications.
    Chemical Society Reviews, Volume:39, Number:3, pages 1153–1182, 2010
    [3] Fei Su and Krishnendu Chakrabarty. Module placement for fault-tolerant
    microfluidics-based biochips. In Proceedings of ACM Transactions on Design
    Automation of Electronic Systems, Volume:11, pages 682–710, 2004
    [4] Krishnendu Chakrabarty and Yang Zhao. Toward fault-tolerant and reconfigurable digital
    microfluidic biochips. In Proceedings of IEEE Asia Symposium on Quality Electronic
    Design, pages 198–207, 2010
    [5] Jong Wook Hong, Stephen R Quake. Integrated nanoliter systems. Nature biotechnology,
    Volume:21, Number:10, pages 1179–1183, 2003
    [6] Fei Su and Krishnendu Chakrabarty. Yield enhancement of reconfigurable
    microfluidics-based biochips using interstitial redundancy. ACM Journal on Emerging
    Technologies in Computing Systems, Volume:2, Number:2, pages 104–128, 2006
    29
    [7] Morten Chabert Eskesen, Paul Pop, and Seetal Potluri. Architecture synthesis for costconstrained
    fault-tolerant flow-based biochips. In Proceedings of IEEE Design Automation
    and Test in Europ Exhibition, pages 618–623, 2016.
    [8] Ying-Han Chen, Chung-Lun Hsu, Li-Chen Tsai, and Tsung-Wei Huang, and Tsung-
    Yi Ho. A reliability-oriented placement algorithm for reconfigurable digital microfluidic
    biochips using 3-D deferred decision making technique. IEEE Transactions on
    Computer-Aided Design of Integrated Circuits and Systems, Volume:32, Number:8,
    pages 1151–1162, 2013.
    [9] Wajid Hassan Minhass, Paul Pop, and Jan Madsen. System-level modeling and synthesis
    techniques for flow-based microfluidic very large scale integration biochips. Technical
    University of Denmark Tekniske Universitet, 2012.
    [10] Oliver Keszocze, RobertWille, and Rolf Drechsler. Exact routing for digital microfluidic
    biochips with temporary blockages. In Proceedings of IEEE/ACM International
    Conference on Computer-Aided Design, pages 405–410, 2014.
    [11] Tsung-Yi Ho, Krishnendu Chakrabarty, and Kai Hu. Testing of flow-based microfluidic
    biochips. In Proceedings of IEEE VLSI Test Symposium, pages 1–6, 2013.
    [12] Fei Su and Krishnendu Chakrabarty. Design of fault-tolerant and dynamicallyreconfigurable
    microfluidic biochips. In Proceedings of Proceedings of IEEE Design
    Automation and Test in Europe, pages 1202–1207, 2005.
    [13] Kai Hu, Feiqiao Yu, Tsung-Yi Ho, and Krishnendu Chakrabarty. Testing of flowbased
    microfluidic biochips: Fault modeling, test generation, and experimental demonstration.
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,
    Volume:33, Number:10, pages 1463–1475, 2014.
    30
    [14] Teofilo F. Gonzalez. Handbook of approximation algorithms and metaheuristics.
    2007.
    [15] GEN. http://www.genengnews.com/, 2015.
    [16] Minhass Wajid Hassan, Paul Pop, and Jan Madsen. System-level modeling and synthesis
    of flow-based microfluidic biochips. In Proceedings of Compilers, Architectures
    and Synthesis for Embedded Systems (CASES), 2011 Proceedings of the 14th International
    Conference on, pages 225–233, 2011.
    [17] Eskesen Morten Chabert. Fault-Tolerant Architecture Design for Flow-Based
    Biochips. Master Thesis, Technical University of Denmark, pages 100, 2015.
    [18] Lampaert Koen, Georges Gielen, and Willy Sansen. Analog layout generation for
    performance and manufacturability. Springer Science & Business Media, Volume:501,
    2013.

    無法下載圖示 全文公開日期 本全文未授權公開 (校內網路)
    全文公開日期 本全文未授權公開 (校外網路)
    全文公開日期 本全文未授權公開 (國家圖書館:臺灣博碩士論文系統)
    QR CODE