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研究生: 李元璞
Yuan-Pu Li
論文名稱: 低功率低失真之D類功率放大器積體電路設計
Low Power and Low Distortion Class D Power Amplifier IC Design
指導教授: 龔正
Jeng Gong
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2005
畢業學年度: 93
語文別: 中文
論文頁數: 84
中文關鍵詞: D類放大器功率放大器
外文關鍵詞: class d, power amplifier
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  • 在本篇論文中,利用TSMC0.35um製程技術來設計應用於音頻上的類比積體電路,並且利用H-SPICE軟體來模擬它,此電路稱為低失真的全橋式D類功率放大器。此電路有別於傳統全橋式D類功率放大器,它改善了傳統D類功率放大器訊號失真過大的缺點,同時卻不因此而使得功率效益變小;改善的方法是藉由加入回授系統;這是一種降低雜訊的技巧;並且改變脈衝寬度調變的方式來實現電路。此外,所設計的電路還有一項優點,就是不需要D類功率放大器的輸出濾波級,此技術使得電路的面積變小,功率效益提高。最後,針對訊號失真的部分再提出兩種無輸出濾波器的調變方式來和所設計的主要調變方式相比較。


    In this work, the designed circuit fabricated by TSMC 0.35um CMOS technology is a kind of analog integrated circuit. This circuit is
    called “Low distortion H-bridge class D power amplifier”, and is simulated by HSPICE. This circuit is different from the traditional H-bridge class D power amplifier. It has improved the shortcoming of the traditional class D power amplifier with too big signal distortion, but not make the power efficiency diminished at the same time. Through joins the feedback system can improve the shortcoming; this is a technology that can reduce noise. And changing the Pulse Width Modulation(PWM) method to realize the circuit. In addition, this designed circuit has another advantage that it eliminates the class-D output filter. This technology can make the area of the circuit diminished and can improve power efficiency at the same time. Finally, aiming at the improvement of signal distortion, two other modulation methods were proposed, and the comparasion with the original modulation method was discussed.

    摘要 …………………………………………….……… I 致謝 ……………………………………………………… III 目錄 …………………………………………….……… IV 圖目錄 …………………………………………………… VII 表目錄 ………………………………………………… XI 第一章 導論…………………………………………… 1 1.1 研究動機與背景 ……………….………………… 1 1.2 研究考量 …………………….…………………… 2 第二章 傳統的D類功率放大器 ………………………… 5 2.1各類功率放大器 …………………….……………… 5 2.1.1 線性功率放大器 ………….……………………  5 2.1.2 非線性功率放大器 ……………….…………… 8 2.1.3 各類功率放大器比較 …………….……………… 11 2.2 低功率D類音頻功率放大器 ………………………… 12 2.2.1 架構 ……………….……………………………… 12 2.2.2 脈衝寬度調變切換技術(PWM switching scheme) 13 2.2.3 全橋式輸出級(H-Bridged output stage) ….… 15 2.3 D類功率放大器的功率效益 ………………………… 16 2.3.1 理論分析 ………………………………….……… 16 2.3.2 實際考量 ……………………………….………… 18 2.4 影響D類放大器總諧波失真(THD)的因素 ………… 22 第三章 設計理論 …………………………….………… 25 3.1 改善失真度的方法 …………………….…………… 25 3.1.1 Feedforward分析 ………………………………… 25 3.1.2 Feedback分析 ……………….…………………… 27 3.2 Feedback在D類放大器的設計 ……………………… 28 3.2.1 所有閉迴網路設計 ……………….……………… 28 3.2.2 閉迴路之轉換函數 …………….………………… 30 3.2.3 設計上的考量 …………………………………… 33 3.3無濾波輸出級調變機制 ………………….………… 35 3.4 PWM訊號調變分析 …………………………………… 39 3.4.1 PWM單電壓極性切換 ……………………..……… 40 3.4.2 其他各類調變方法 ……………….……………… 41 第四章 電路模擬分析與討論 ……………………..…… 43 4.1 內部應用電路設計 ………….……………………… 43 4.1.1遲滯比較器(Hysteresis Comparator) ………… 43 4.1.2三角波產生器(Triangle Generator) …….…… 47 4.1.3運算放大器(Operational Amplifier) .………… 51 4.2 外部電路設計 ……………………………………… 55 4.2.1參數的設計 ……………………….……………… 55 4.2.2 Gate-Driver電路 ……………….……………… 56 4.2.3低通濾波器 ………………………………………  61 4.3 D類功率放大器之模擬結果與討論 ………………… 63 4.3.1電路模擬與討論 ……………………….………… 63 4.3.2針對THD之設計限制的模擬分析 ………………… 70 4.4 其他調變方式對於THD的模擬分析 ………………  74 4.4.1 兩個不同載波振幅之PWM對THD模擬分析 …….  74 4.4.2 50%責任週期CLOCK之PWM對THD模擬分析…..... 77 4.4.3 三種調變方式的比較 …………………………… 78 第五章 結論 …………………………………………… 81 參考文獻 …………………….………………………… 82

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