簡易檢索 / 詳目顯示

研究生: 周韋帆
Chou, Wei-Fan
論文名稱: 一個具有臨界電壓消除技術及可調變轉換曲線之高動態範圍線性對數互補式金氧半導體影像感測器
A High Dynamic Range Linear-Logarithmic CMOS Image Sensor with Threshold Voltage Cancellation Scheme and Tunable Response Curve
指導教授: 謝志成
Hsieh, Chih-Chang
口試委員: 陳巍仁
Chen, Wei-Zen
洪浩喬
Hong, Hao-Chiao
闕河鳴
Chiueh, Herming
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2012
畢業學年度: 101
語文別: 英文
論文頁數: 76
中文關鍵詞: 互補式金氧半導體影像感測器線性對數反應高動態範圍固定圖像雜訊
外文關鍵詞: CMOS image sensor, linear-logarithmic response, high dynamic range, fixed pattern noise
相關次數: 點閱:2下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 本論文描述了一個應用臨界電壓消除技術以降低固定圖像雜訊及可調變轉換曲線之高動態範圍線性對數互補式金氧半導體影像感測器。此論文貢獻了許多創新之處,首先是提出了一個不需要任何的外部影像處理的五電晶體畫素線性對數互補式金氧半導體影像感測器,其感測器可藉由調整不同線性對數轉換點來改變線性範圍,因此在不同的影像環境皆能獲得最佳的影像對比度。第二為提出一個具有三個操作時序並內嵌於畫素的臨界電壓消除技術,用來消除在強光源環境的對數模式下因電晶體臨界電壓漂移所造成的固定圖像雜訊,藉此改善影像的均勻度。第三為提出一個具有可程式化的增益之欄共用式運算放大器,用於解決在傳統主動式畫素感測器中因源級跟隨器所造成的增益耗損。
    此操作電壓為3.3伏特之高動態範圍線性對數互補式金氧半導體影像感測器晶片使用n+/p-sub 感光二極體的100 x 100畫素陣列,每畫素包含五個電晶體,其畫素大小為6 x 6 um2,填充因子為32.54%,並以TSMC 0.18μm CMOS 1P6M 標準製程製作。本影像感測器晶片的量測結果於50幀率下其動態範圍為143.89dB,在對數模式下的固定圖像雜訊相較於對數感光度下為1.96% (rms/log-sensitivity),相較於線性感光度下為0.45% (rms/Vlog-swing),線性感光度為651mV/lux-s,對數感光度為55mV/decade,時間雜訊及功率消耗分別為0.7462mV及1.88mW。


    This thesis presents a high dynamic range linear-logarithmic CMOS image sensor pixel with threshold voltage cancellation scheme for reducing fix pattern noise (FPN) and tunable response curve for different environment. There are three innovations in this thesis. First, a novel five transistors pixel linear-logarithmic CMOS image sensor with adjustable linear region provides a tunable switching point between linear and logarithmic response without any post-processing to obtain the best image contrast in different environment. Second, A novel in-pixel threshold voltage cancellation scheme in three phases operation can eliminate the offset FPN from MOSFET’s threshold variation due to logarithmic mode operation at high illumination environment and improve the non-uniformity of the image efficiently. Third, a column shared-OPAMP with column amplifier is used in column circuit for solving the gain loss problem caused by source follower in convention active pixel sensor and providing a programmable gain to magnify pixel signal.
    The prototype high dynamic linear-logarithmic CMOS image sensor chip consisting of 100 x 100 5-T pixel array with n+/p-sub photodiode and pixel pitch as 6 x 6 μm2 with 32.54% fill factor and 3.3V operation has been designed and fabricated in TSMC 0.18μm CMOS 1P6M standard process. The measured results achieve a dynamic range of 143.89dB, a FPN related to sensitivity in logarithmic response (rms/log-sensitivity) of 1.96%, and a FPN related to full-swing in logarithmic response (rms/Vlog-swing) of 0.45%, respectively. Linear and logarithmic sensitivity are 651mV/lux-s and 55mV per decade of illuminance 50 frames/s. The temporal noise and power consumption are 0.7462mV and 1.88mW.

    CONTENTS ABSTRACT ii CONTENTS v LIST OF FIGURES viii LIST OF TABLES xi Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Contribution 2 1.3 Thesis Organization 3 Chapter 2 Background Information 5 2.1 Architecture Selection 6 2.1.1 Active Pixel Sensor 6 2.1.2 High Dynamic Range Techniques of Image Sensor 8 2.1.2.1 Multiple Exposure Scheme 9 2.1.2.2 Well Capacity Adjustment Scheme 10 2.1.2.3 Pulse Modulation Scheme 11 2.1.2.4 Logarithmic Image Sensor 13 2.1.2.5 Linear-Logarithmic Image Sensor 15 2.1.3 Researches of Linear-Logarithmic Image Sensor 16 2.2 Design Considerations of Linear-Logarithmic Image Sensor 21 2.2.1 Temporal Noise 21 2.2.2 Fixed Pattern Noise 22 2.2.3 Dynamic Range 23 2.2.4 Fill Factor 23 2.3 Summary 23 Chapter 3 Linear-Logarithmic Pixel with Threshold Voltage Cancellation Scheme 25 3.1 Switching Method between Linear and Logarithmic Response 25 3.2 Pixel Implementation 26 3.2.1 Concept of Threshold Voltage Cancellation Scheme 27 3.2.2 Pixel Structure and Operation 28 3.3 Simulation Results 33 3.4 Summary 37 Chapter 4 Prototype Design of Linear-Logarithmic CMOS Image Sensor 38 4.1 System Architecture of Linear-Logarithmic CMOS Image Sensor 38 4.2 Column Shared-OP with Column Amplifier 40 4.2.1 Column Shared Folded Cascode OP 40 4.2.2 Column Amplifier 43 4.3 Correlated Double Sampling Circuit 45 4.4 Column and Row Selects 47 4.5 Read Controller 48 4.6 Chip Operation 50 4.7 Summary 52 Chapter 5 Measurement Results 53 5.1 Imager Chip 53 5.2 Measurement Environment Setup 56 5.3 Photoelectric Conversion Characteristic 58 5.4 Column Amplifier Measurement 59 5.5 Fixed Pattern Noise Measurement 60 5.6 Sample Images 62 5.7 Summary 65 Chapter 6 Conclusions 67 6.1 Summary 67 6.2 Future Work 69 Bibliography 70

    [1] W. F. Chou, S. F. Yeh, and C. C. Hsieh, “A 143dB 1.96% FPN Linear-Logarithmic CMOS Image Sensor with Threshold-Voltage Cancellation and Tunable Linear Range,” in Proc. ICSENS, Oct. 2012.
    [2] J. Ohta, Smart CMOS Imager Sensors and Applications, CRC Press
    [3] P. J. W. Noble, “Self-scanned silicon image detector arrays,” IEEE Trans. Electron Devices, vol.15, no. 4, pp. 202-209, Apr. 1968.
    [4] A. El Gamal and H. Eltoukhy, “CMOS image sensors,” IEEE Circuits Devices Mag., vol. 21, no. 3, pp. 6–20, May/Jun. 2005.
    [5] E. Fossum, “Active pixel sensors: Are ccd’s dinosaurs?” in Proc. SPIE Charged-Coupled Devices and Solid State Optical Sensors III, vol. 1900, pp. 30–39, 1993.
    [6] R. Guidash, T.-H. Lee, P. Lee, D. Sackett, C. Drowley, M. Swenson, L. Arbaugh, R. Hollstein, F. Shapiro, and S. Domer, “A 0.6 μm cmos pinned photodiode color imager technology,” in Proc. Int. Electron Devices Meeting Tech. Dig., pp. 927–929, Dec. 1997.
    [7] J.-E. Eklund, C. Svensson, and A. Astrom, “Vlsi implementation of a focal plane image processor-a realization of the near-sensor image processing concept,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 4, no. 3, pp. 322–335, Sep. 1996
    [8] B. J. Hosticka and W. Brockherde, A. Bussmann, T. Heimann, R. Jeremias, A. Kemna, C. Nitta, and O. Schrey. “CMOS imaging for automotive applications,” IEEE Trans. Electron Devices, vol.50, no. 1, pp. 173-183, Jan. 2003.
    [9] S. Yuanyuan, Z. Weigong, G. Yong, and T. Xiaohui, “Research on a method to extend dynamic range of CMOS APS,” IEEE International Workshop on Imaging Systems and Techniques, pp.212-216, Sep. 2008
    [10] D. X. D. Yang, A. E. Gamal, B. Fowler, and H. Tian, “A 640x512 CMOS image sensor with ultrawide dynamic range floating-point pixel-level ADC,” IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1821-1834, Dec. 1999.
    [11] D. Stoppa, A. Simoni, L. Gonzo, M, Gottardi, and G. F. D. Betta, “Novel CMOS image sensor with a 132-dB dynamic range,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1846-1852, Dec. 2002.
    [12] Z. Ignjatovic and M. F. Bocko, “A 0.88nW/pixel, 99.6 dB Linear-Dynamic-Range Fully-Digital Image Sensor Employing a Pixel-Level Sigma-Delta ADC,” in Symp. VLSI Circuits, 2006, pp. 23-24.
    [13] M. Mase, S. Kawahito, M. Sasaki, Y. Wakamori, and M. Furuta, “A wide dynamic range CMOS image sensor with multiple exposure-time signal outputs and 12-bit column-parallel cyclic A/D converters,” IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2787-2795, Dec. 2005.
    [14] K. Mabuchi, N. Nakamura, E. Funatsu, T. Abe, T. Umeda, T. Hoshino, R. Suzuki, and H. Sumi, “CMOS image sensor using a floating diffusion driving buried photodiode,” in Proc. IEEE ISSCC Dig. Tech. Papers, 2004, pp. 112–516.
    [15] M. Sasaki, M. Mase, S. Kawahito, and Y. Tadokoro, “A wide dynamic range CMOS image sensor with multiple short-time exposures,” in Proc. IEEE Sens. Conf., Oct., 2004, pp. 967-972.
    [16] P. Acosta-Serafini, I. Masaki, and C. Sodini, “A 1/3" VGA linear wide dynamic range CMOS image sensor implementing a predictive multiple sampling algorithm with overlapping integration intervals,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1487-1496, Sep. 2004.
    [17] P. Acosta-Serafini, I. Masaki, and C. Sodini, “A 1/3" VGA linear wide dynamic range CMOS image sensor implementing a predictive multiple sampling algorithm with overlapping integration intervals,” in Proc. IEEE CICC Dig. Tech. Papers, 2003, pp. 485- 488.
    [18] O. Yadid-Pecht and E. R. Fossum, “Wide intrascene dynamic range CMOS APS using dual sampling,” IEEE Trans. Electron Devices, vol. 44, no. 10, pp. 1721-1723, Oct. 1997.
    [19] D. Kim, Y. Chae, J. Cho, and G. Han, “A Dual-Capture Wide Dynamic Range CMOS Image Sensor Using Floating-Diffusion Capacitor,” IEEE Trans. Electron Device, vol. 55, no. 10, pp. 2590-2594, Oct. 2008.
    [20] S. F. Yeh, C. C. Hsieh, C. J. Cheng, and C. K. Liu, “A novel single slope ADC design for wide dynamic range CMOS image sensors,” in Proc. IEEE Sens. Conf., Oct., 2011, pp. 889-892.
    [21] N. Akahane, S. Sugawa, S. Adachi, K. Mori, T. Ishiuchi, and K. Mizobuchi, “A sensitivity and linearity improvement of a 100-dB dynamic range CMOS image sensor using a lateral overflow integration capacitor,” IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 851-858, Apr. 2006.
    [22] S. Decker, R. D. McGrath, K. Brehmer, and C. G. Sodini, “A 256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output,” IEEE J. Solid-State Circuits, vol. 33, no. 12, pp. 2081-2091, Dec. 1998.
    [23] R. Oi, and K. Aizawa, “Wide dynamic range imaging by sensitivity adjustable CMOS image sensor,” in Proc. ICIP, Sep. 2003, pp. 583-586.
    [24] N. Akahane, S. Sugawa, S. Adachi, K. Mori, T. Ishiuchi, and K. Mizobuchi, “A sensitivity and linearity improvement of a 100-dB dynamic range CMOS image sensor using a lateral overflow integration capacitor,” IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 851-858, Apr. 2006.
    [25] Y. Muramatsu, S. Kurosawa, M. Furumiya, H. Ohkubo, and Y. Nakashiba, “A Signal-Processing CMOS Image Sensor using Simple Analog Operation,” in Proc. IEEE ISSCC Dig. Tech. Papers, 2001, pp. 98-99.
    [26] S.T. Smith, P. Zalud, J. Kalinowski, N.J. McCaffrey, P.A. Levine, and M.L. Lin. “BLINC: a 640 × 480 CMOS active pixel video camera with adaptive digital processing, extended optical dynamic range, and miniature form factor,” in Proc. SPIE, vol. 4306, pp. 41-49, Jan. 2001.
    [27] M. T. Chung, “An Ultra-Low Voltage 0.5V PWM CMOS Imager with Dynamic Range Extension and Noise Suppression,” National Tsing Hua University, May. 2012.
    [28] M. Nagata, J. Funakoshi, and A. Iwata, “A PWM Signal Processing Core Circuit Based on a Switched Current Integration Technique,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 53-60, Jan. 1998.
    [29] M. Nagata, M. Homma, N. Takeda, T. Morie, and A. Iwata, “A smart CMOS imager with pixel level PWM signal processing,” in Symp. VLSI Circuits, 1999, pp. 141-144.
    [30] M. Shouho, K. Hashiguchi, K. Kagawa, and J. Ohta, “A Low-Voltage Pulse- Width-Modulation Image Sensor,” in IEEE Workshop on Charge-Coupled Devices & Advanced Image Sensors, Jun. 2005, pp. 226–229.
    [31] H. Amhaz and G. Sicard, “A high output voltage swing logarithmic image sensor designed with on chip FPN reduction,” in Proc. PRIME, July 2010, pp. 1-4.
    [32] S. Kavadias, B. Dierickx, D. Scheffer, A. Alaerts, D. Uwaerts, and J. Bogaerts, “A logarithmic response CMOS image sensor with on-chip calibration,” IEEE J. Solid-State Circuits, vol. 35, no. 8, pp. 1146-1152, Dec. 2000.
    [33] M. K. Law, A. Bermak, and C. Shi, “A Low-Power Energy-Harvesting Logarithmic CMOS Image Sensor With Reconfigurable Resolution Using Two-Level Quantization Scheme,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol.58, no.2, pp. 80-84, Feb. 2011.
    [34] L. W. Lai, C. H. Lai, and Y. C. King, “A novel logarithmic response CMOS image sensor with high output voltage swing and in-pixel fixed-pattern noise reduction,” IEEE Sensors J., vol.4, no.1, pp. 122-126, Feb. 2004.
    [35] M. Loose, K. Meier, and J. Schemmel, “A self-calibrating single-chip CMOS camera with logarithmic response,” IEEE J. Solid-State Circuits, vol.36, no.4, pp. 586-596, Apr. 2001.
    [36] D. Das, H. J. Mills, and S. Collins, “A wide dynamic range CMOS image sensor with the optimum photoresponse per pixel,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), May. 2011, pp. 1560-1563.
    [37] D. Das and S. Collins, “A wide dynamic range integrating pixel with an improved low light sensitivity,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), May. 2010, pp. 4261-4264.
    [38] B. Choubey, S. Aoyama, D. Joseph, S. Otim, and S. Collins, “An electronic calibration scheme for logarithmic CMOS pixels,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), May. 2004, pp. 856-859.
    [39] B. Choubey, S. Aoyama, S. Otim, D. Joseph, and S. Collins, “An Electronic-Calibration Scheme for Logarithmic CMOS Pixels,” IEEE Sensors J., vol.6, no.4, pp. 950-956, Aug. 2006.
    [40] H. Y. Cheng, B. Choubey, and S. Collins, “An Integrating Wide Dynamic-Range Image Sensor With a Logarithmic Response,” IEEE Trans. Electron Devices, vol.56, no.11, pp. 2423-2428, Nov. 2009.
    [41] D. Joseph and S. Collins, “Transient Response and Fixed Pattern Noise in Logarithmic CMOS Image Sensors,” IEEE Sensors J., vol.7, no.8, pp. 1191-1199, Aug. 2007.
    [42] A. El Gamal, “High Dynamic Range Image Sensors,” Tutorial at International Solid-State Circuits Conference, Feb. 2002.
    [43] Y. NI and K, Matou, “A CMOS log image sensor with on-chip FPN compensation,” in Proc. ESSCIRC, Sep., 2001, pp. 101-104.
    [44] J. Guo and S. Sonkusale, “A High Dynamic Range CMOS Image Sensor for Scientific Imaging Applications,” IEEE Sensors J., vol.9, no.10, pp. 1209-1218, Oct. 2009.
    [45] M. Vatteroni, D. Covi, and A. Sartori, “A linear-logarithmic CMOS pixel for high dynamic range behavior with fixed-pattern-noise correction and tunable responsivity,” in Proc. ICSENS, Oct. 2008, pp. 930-933.
    [46] K. Hara, H. Kubo, M. Kimura, F. Murao, and S. Komori, “A linear-logarithmic CMOS sensor with offset calibration using an injected charge signal,” in Proc. IEEE ISSCC Dig. Tech. Papers, 2005, pp. 354–355.
    [47] J. Guo and S. Sonkusale, “An auto-switched mode CMOS image sensor for high dynamic range scientific imaging applications,” in Proc. ICSENS, Oct. 2008, pp. 355-358.
    [48] G. Storm, J. E. D. Hurwitz, D. Renshaw, K. Findlater, R. Henderson, M. Purcell, “Combined linear-logarithmic CMOS image sensor,” in Proc. IEEE ISSCC Dig. Tech. Papers, 2004, pp. 116–117.
    [49] G. Storm, R. Henderson, J. E. D. Hurwitz, D. Renshaw, K. Findlater, and M. Purcell, “Extended Dynamic Range From a Combined Linear-Logarithmic CMOS Image Sensor,” IEEE J. Solid-State Circuits, vol.41, no.9, pp. 2095-2106, Sep. 2006.
    [50] M. Vatteroni, P. Valdastri, A. Sartori, A. Menciassi, and P. Dario, “Linear–Logarithmic CMOS Pixel With Tunable Dynamic Range,” IEEE Trans. Electron Devices, vol.58, no.4, pp. 1108-1115, Apr. 2011.
    [51] H. Stöhr, C. Softley, “CMOS chip technology for automotive imagers,” Photonfocus AG, Dec. 2004.
    [52] L.W. Huang, “A 1.8V Readout Integrated Circuit with Adaptive Transimpedance Control Amplifier for IR Focal Plane Arrays,” National Tsing Hua University, Oct. 2011.

    無法下載圖示 全文公開日期 本全文未授權公開 (校內網路)
    全文公開日期 本全文未授權公開 (校外網路)

    QR CODE