光感性低介電常數材料於後通道蝕刻薄膜電晶體上之研究

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研究生：	江政禕 Cheng-Yi Chiang
論文名稱：	光感性低介電常數材料於後通道蝕刻薄膜電晶體上之研究 Study on Photo-Sensitive Low Dielectric Materials Passivation on Back-Channel-Etched Amorphous Silicon Thin Film Transistors
指導教授：	葉鳳生 Feng-Sheng Yeh 張鼎張 Ting-Chang Chang
口試委員:
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering
論文出版年：	2006
畢業學年度：	94
語文別：	中文
論文頁數：	59
中文關鍵詞：	非晶矽、薄膜電晶體
外文關鍵詞：	amorphous silicon, thin film transistor
相關次數：	點閱：3 下載：0
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摘要
本論文研究感光性低介電常數材料於薄膜電晶體技術上的應
用。由於感光性低介電常數材料應用於薄膜電晶體 (TFT) 元件上的
平化保護層 (planarized passivation layer) 時，除了其具有高透光率
(> 90% at 300-800 nm)、低的光漏電以及好的平坦化 (planarization)
能力之外，還能夠提高薄膜電晶體顯示器的開口率 (aperture ratio)，
降低電晶體陣列連線中電阻-電容延遲時間 (RC delay time)。更重要
的是,材料的感光性更可簡化製程及減少製程步驟。因此，感光性低
介電常數材料於薄膜電晶體顯示器上的研究與應用，便成為重要的顯
示器技術發展趨勢。本論文選擇了兩種種具有潛力的感光性低介電常
II
數材料做為研究主題。
在對薄膜電晶體上的應用，保護層對元件電性的影響是最重要的
課題。我們在本論文中分別探討了兩種感光性低介電常數材料與傳統
氮化矽保護層材料對元件特性的影響。
研究的總結，我們發現感光性低介電常數材料作為保護層，在照
光操作下對元件並不會產生太大的影響。另外在可靠度方面，元件特
性表現亦佳。所以，未來感光性低介電常數材料薄膜將有可能替換傳
統氮化矽保護層，成為應用在薄膜電晶體保護層方面的候選人。

Abstract
In this thesis, we investigated the application of photo-sensitive low
dielectric passivation materials for thin-film-transistor (TFT) technology.
photo-sensitive low dielectric passivation materials has the properties of
the high transmittance (>90% at 300~800 nm), low photo leakage current
and good planarization for TFT passivation layer. In addition, it can
effectively increase the aperture ratio of display matrix and reduce
resistance-capacitance delay (RC delay). More importantly, the
photosensitivity of material property makes to simplify process and
reduce fabrication steps. Therefore, the application of the photo-sensitive
low dielectric passivation materials on TFT device has become one of the
most important issue for flat panel display. In this study we have
investigated two of the promising candidates of photo-sensitive low
dielectric passivation materials for TFT array technology application.
In TFT process, the effects of passivation layers on device electrical
characteristics are the most important issue. In this study, the effects of
two kinds photo-sensitive low dielectric passivation materials and
conventional silicon nitride passivation layer on device electrical
characteristics are discussed.
In conclusion, we have found that the leakage of devices with
photo-sensitive low dielectric passivation is little changed by illumination.
Otherwise, device performance exhibits also well in reliability. This
indicates that photo-sensitive low dielectric passivation materials are the
most possible candidate to replace the conventional SiNx passivation
layer on TFT device in the future.

Contents
Chinese Abstract I
English Abstract III
Acknowledgement (Chinese) V
Contents VI
Figure Captions VIII
Table List XI
Chapter 1. Introduction 1
1.1 General Background 1
1.2 High Transmittance Low-k Materials for TFT-LCD Panel
Application 3
1.3 Novel Low-K Passivation Materials for TFT-LCD Application 5
1.4 Thesis Outline 5
Chapter 2. Material Characteristics Analyses of Passivation Materials 7
2.1 Introduction 7
2.2 Experimental procedures 7
2.3 Results and Discussions 8
2.4 Summary 10
Chapter 3. Electrical Characteristics Analyses of assivated a-Si BCE-TFT 11
3.1 Introduction 11
3.2 Results and Discussions 12
3.3 Summary 16
Chapter 4. Instability and Reliability of Passivated a-Si BCE-TFT 17
VII
4.1 instability of passivated TFT under illumination 17
4.1.1 Introduction 17
4.1.2 Mechanisms of BCE-TFT’s behavior under illumination 18
4.1.3 Analysis of passvated BCE-TFT under illumination 19
4.2 Reliability of Passvated BCE-TFT 20
4.2.1 Introduction 20
4.2.2 Results and discussions 21
4.3 Summery 22
Chapter 5 conclusion 23
Reference 25
Table 28
Figure 30
VIII
Figure Captions
Chapter 1
Fig 1-1 cross section of a pixel of TFT LCD
Fig 1-2 the structure of active layer
Fig 1-3 the band structure of silicon
Fig 1-4 schematcs of the TFT structures wth a standard panel and high
aspect ratio panel, respectively
Chapter 2
Fig 2-1 FTIR absorption measurements which include before curing and
after curing of passivation material N
Fig 2-2 FTIR absorption measurements which include before curing and
after curing of passivation material Y
Fig 2-3 (a) the chemical bonding structure of Y before curying
Fig 2-3 (b) the chemical bonding structure of Y after curying
Fig 2-4 the adhesions to a (100) p-type single-crystal silicon wafer of
different films
Fig 2-5 the adhesions to the different substrates
Fig 2-6 the film stresses of N, Y, SiO2, SiNx
Fig 2-7 the leakage behaviors of MIS capacitor structure
Chapter 3
Fig 3-1 the process flow of conventional 4-masks passivated BCE-TFT
Fig 3-2 cross section of back-channel-etched TFT with passivation layer
IX
Fig 3-3 the transfer and output characteristics of SiNx passivated
BCE-TFT width 30µm/length 10µm
Fig 3-4 the transfer and output characteristics of N passivated BCE-TFT
width 30µm/length 10µm
Fig 3-5 the transfer and output characteristics of Y passivated BCE-TFT
width 30µm/length 10µm
Fig 3-6 the transfer characteristics of SiNx, N, Y passivated BCE-TFT
width 30µm/length 10µm
Fig 3-7 Surface band banding profile and the x component of the current
density Jx calculated across the a-Si:H layer for various gate
voltage at Vds = 10 V, where EqF is the electron quasi-Fermi level
Fig 3-8 the peak current density Jx versus gate bias both at the front and
at the back interface obtained from Fig. 3-7
Fig 3-9 device band diagram in Poole-Frenke region of an a-Si TFT with
organic passivation layer
Fig 3-10device band diagram in reverse subthreshold region of an a-Si
TFT with organic passivation layer
Fig 3-11the transfer characteristics of N, Y passivated BCE-TFT width
20µm/length 10µm
Fig 3-12the transfer characteristics of N, Y passivated BCE-TFT width
50µm/length 10µm
Chapter 4
Fig 4-1 typical TFT transfer characteristic simulated under illumination
Fig 4-2 the cross sections of typical TFT under illumination in Fig 4-1
Fig 4-3 the transfer characteristics of SiNx, N, Y passvated BCE-TFT
X
under illumination, width 30μm/length 10μm
Fig 4-3the transfer characteristics of SiNx, N, Y passvated BCE-TFT
under illumination, width 50μm/length 10μm
Fig 4-4the transfer characteristic of standard BCE-TFT as stress times
width 30μm/length 10μm
Fig 4-5the transfer characteristic of N passivated BCE-TFT as stress
times width 30μm/length 10μm
Fig 4-6the transfer characteristic of Y passivated BCE-TFT as stress
times width 30μm/length 10μm
Fig 4-7the transfer characteristic of SiNx passivated BCE-TFT as stress
times width 30μm/length 10μm
Fig 4-8the threshold voltage shifts of standard and SiNx, N, Y passivated
devices
XI
Table List
Tab 1-1 the requirements for low-k dielectrics
Tab 2-1 comparison of different passivation materials

                                

Reference
[1-1] L. Peters, “Pursuing the perfect low-.kappa. dielectric,” Semiconductor
International, Cover Story, p. 64, September 1998.
[1-2] T. E. Seidel and C. H. Ting, “Methods and Needs For Low k Material
Research,” Mater. Res. Soc. Symp. Proc., 381, 3 (1995).
[1-3] R. Y. Leung, T. Nakano, S. Case, B. Sung, J. J. Yang, and D. K. Choi, Int.
Dielectrics for ULSI Multilevel Interconnection Conference, p. 49 (1997).
[1-4] G. Sugahara, N. Aoi, M. Kubo, K. Arai, and K. Sawada, “Low Dielectric
Constant Carbon Containing SiO2 Films Deposited by PECVD Technique Using a
Novel CVD Precursor,” Int. Dielectrics for ULSI Multilevel Interconnection
Conference, p. 19 (1997).
[1-5]H. Treichel, G. Ruhl, P. Ansmann, R. Wuller, M. Dietlmeier and G. Maier,
Proceedings of The First International Dielectrics for VLSI/ULSI Multilevel
Interconnection Conference (DUMIC) (IEEE, Santa Clara, CA. 1998), p.201.
[3-1] J. K. Yoon and J. H. Kim, “Device Analysis for a-Si:H Thin-Film Transistors
with Organic Passivation Layer,” IEEE Electron Devices Letters, vol. 19, no. 9,
September 1998.
[3-2] J. H. Lan and J. Kanicki, “Planarization of amorphous-silicon thin-film
transistor for the high-aperture-ratio active-matrix liquid-crystal displays,” in Proc. Int.
Display Res. Conf., 1997, pp. L58–L61.
[3-3] J. H. Kim, J. Y. Park, J. K. Yoon, and H. S. Soh, “Characteristics of amorphous
silicon thin film transistors with the organic passivation layer,” in Proc. Int. Display
Res. Conf., 1997, pp. 53–56.
[3-4] M. J. Powell and J. Pritchard, “The effect of surface states and fixed charge on
the field effect conductance of amorphous silicon,” J. Appl. Phys., vol. 54, no. 6, pp.
3244–3248, June 1983.
[3-5] M. Shur and M. Hack, “Physics of amorphous silicon based alloy thin-film
transistors,” J. Appl. Phys., vol. 55, no. 10, pp. 3831–3842, 1990.
[3-6] P. Servati and A. Nathan, “Modeling of the Reverse Characteristics of a-Si:H
TFTs,” IEEE Trans. Electron Devices, 49(5), 812(2002)
[3-7] R. A. Street, M. J. Thompson, and N. M. Johnson, “The Electrical
Characterization of Surfaces, Interfaces and Contacts to a-Si:H,” Phil. Mag. B, 51(1),
1(1985).
[4-1] S. Martin, J. Kanicki, N. Szydlo, A. Rolland, "Analysis of the Amorphous
Silicon Thin Film Transistors Behavior under Lllumination,"
[4-2] M. J. Powell, “Charge Trapping Instabilities in Amorphous Silicon-silicon
Nitride Thin-film Transistors,” Appl. Phys. Lett., 43(6), 597(1983).
[4-3] W. B. Jackson and M. D. Moyer, “Creation of Near-interface Defects in
Hydrogenated Amorphous Silicon-silicon Nitride Heterojunctions: the Role of
Hydrogen,” Phys. Rev. B, 36(11), 6217(1987).
[4-4] F. R. Libsch and J. Kanicki, “Bias-stress-induced Stretched-exponential Time
Dependence of Charge Injection and Trapping in Amorphous Silion Thin-film
Transistors,” Appl. Phys. Lett., 62(11), 1286(1993).
[4-5] F. R. Libsch, “Steady State and Pulsed Bias Stress Induced Degradation in
Amorphous Silicon Thin-film Transistors for Active-matrix Liquid-crystal Displays,”
IEDM 1992 Technical Digest, 681 (1992).
[4-6] F. R. Libsch and J. Kanicki, “Bias-stress-induced Stretched-exponential Time
Dependence of Charge Injection and Trapping in Amorphous Silicon Thin-film
Transistors,” Extended Abstracts of the 1992 International Conference on Solid State
Devices and Materials, 155, (1992).
[4-7] M. J. Powell, C. van Berkel, A. R. Franklin, S. C. Deane, and W. I. Milne,
“Defect Pool in Amorphous-silicon Thin-film Transistors,” Phys. Rev. B, 45(8),
4160(1992).
[4-8] M. Stutzmann, “Weak Bond-dangling Bond Convension in Amorphous Silicon,”
Phil. Mag. B, 56(1), 63(1987).
[4-9] Z. E. Smith and S. Wagner, “Band Tails, Entropy, and Equilibrium Defects in
Hydrogenated Amorphous Silicon,” Phys. Rev. Lett., 59(6), 688(1987).
[4-10] D. L. Staebler and C. R. Wronski, “Reversible Conductivity Charge in
Discharge-produced Amorphous Si,” Appl. Phys. Lett., 31(4), 292(1977).
[4-11] M. Stutzmann, W. B. Jackson, and C. C. Tsai, “Light-induced Metastable
Defects in Hydrogenated Amorphous Silicon: A Systematic Study,” Phys. Rev. B,
32(1), 23(1985).
[4-12] M. J. Powell, S. C. Deane, I. D. French, J. R. Hughes, and W. I. Milne, “A
Defect-pool for Near-interfae States in Amorphous Silicon Thin-film Transistors,”
Phil. Mag. B, 63(1), 325(1991).
[4-13] C. van Berkel and M. J. Powell, “Resolution of Amorphous Silicon Thin-film
Transistor Instability Mechanisms Using Ambipolar Transistors,” Appl. Phys. Lett.,
51(41), 1094(1987).
[4-14] M. J. Powell, C. van Berkel, I. D. French, and D. H. Nicholls, “Bias
Dependence of Instability Mechanisms in Amorphous Silicon Thin Film Transistors,”
Appl. Phys. Lett., 51(16), 1242(1987).

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