在先進的技術節點中，每個標準元件在元件庫裡面可能有很多版本的實體設計。不同版本的元件會有不同的驅動能力，因此面積也不相同。低驅動力的版本可以被設計成單列高度，而高驅動力的版本可以被設計成雙列、甚至是多列高。隨著這種多列高的標準元件在VLSI設計中越來越普遍，元件的擺置問題也變得更加棘手。我們無法再將晶片中不同列的擺放問題單獨處理，因此傳統上基於一列的合法化演算法已無法使用。
在本篇論文中，我們提出了一種高效率的線性時間混和列高標準元件合法化方法，可以最佳化標準元件的總位移量與最大位移量。首先，使用[1]提出的Window-based插入方法，快速的幫所有標準元件取得初始排序與垂直位置，這有助於降低標準元件的總位移量。第二階段使用一個疊代式(Iterative)的演算法，藉由不斷交換標準單元的位置來降低最大位移量。接著會使用一種基於有向無環圖(DAG)的線性時間演算法，在不改變標準單元排序與垂直位置的情況下最小化最大位移量。最後一個步驟使用了一個啟發式(Heuristic)的演算法，嘗試在不影響最大位移量的前提下降低標準元件的總位移量。
這套方法可以盡可能的保留全局布局(Global placement)的結果，與最新研究相比，我們提出的方法可以得出相似的總位移量，同時降低約12.2%的最大位移量。

Due to the aggressive scaling of advanced technology nodes, each standard cell may have several variants in the cell library. Different versions of a standard cell will have different driving power and physical footprints. Low-driving cells may be designed as single-row height, whereas high-driving variants may be designed as double- or multiple-row height. As mixed-height-cell designs become more and more common, the placement problem has become much more complex than before since cells are no longer independent among different rows, which makes traditional row-based legalization approaches obsolete.
In this thesis, we present a highly efficient mixed-cell-height legalizer that optimizes both the maximum and total cell displacement.
First, a fast window-based cell insertion technique introduced in [1] is applied to obtain a feasible initial row assignment and cell ordering which is known to be good for total displacement consideration.
In the second stage, we use an iterative cell swapping algorithm to alter the row assignment and the cell order of the critical cells to reduce the maximum displacement.
Then we develop an optimal linear time DAG-based fixed row and fixed order legalization algorithm to minimize the maximum cell displacement.
Finally, we propose a cell shifting heuristic to reduce the total cell displacement without harming the maximum cell displacement.
Using the proposed approach, the quality provided by the global placement can be preserved to the greatest extent.
Compared with the state-of-the-art work [1], experimental results show that our proposed algorithm can reduce the maximum cell displacement by more than 12.2% on average with similar average cell displacement.

[1] H. Li, W.-K. Chow, G. Chen, B. Yu, and E. F. Young, “Pin-accessible legalization for mixed-cell-height circuits,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1–1, 2021.
[2] X. Li, J. Chen, W. Zhu, and Y.-W. Chang, “Analytical mixed-cell-height legalization considering average and maximum movement minimization,” in Proceedings of the 2019 International Symposium on Physical Design, ISPD ’19, p. 27–34, 2019.
[3] W.-K. Chow, C.-W. Pui, and E. F. Y. Young, “Legalization algorithm for multiple-row height standard cell design,” in 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), pp. 1–6, 2016.
[4] N. Karimpour Darav, I. S. Bustany, A. Kennings, and L. Behjat, “A fast, robust network flow-based standard-cell legalization method for minimizing maximum movement,” in Proceedings of the 2017 ACM on International Symposium on Physical Design, ISPD’17, p. 141–148, 2017.
[5] U. Brenner and J. Vygen, “Legalizing a placement with minimum total movement,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 12, pp. 1597–1613, 2004.
[6] K. Doll, F. Johannes, and K. Antreich, “Iterative placement improvement by network flow methods,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 13, no. 10, pp. 1189–1200, 1994.
[7] M. Cho, H. Ren, H. Xiang, and R. Puri, “History-based vlsi legalization using network flow,” in Design Automation Conference, pp. 286–291, 2010.
[8] U. Brenner, A. Pauli, and J. Vygen, “Almost optimum placement legalization by minimum cost flow and dynamic programming,” in Proceedings of the 2004 International Symposium on Physical Design, ISPD ’04, (New York, NY, USA), p. 2–9, Association for Computing Machinery, 2004.
[9] Sarrafzadeh and M. Wang, “Nrg: global and detailed placement,” in 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD), pp. 532–537, 1997.
[10] D. F. Wong, C. L. Liu, and H. W. Leong, Simulated annealing for VLSI design. Kluwer, 1988.
[11] T. Luo, H. Ren, C. Alpert, and D. Pan, “Computational geometry based placement migration” in ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005., pp. 41–47, 2005.
[12] H. Ren, D. Pan, C. Alpert, and P. Villarrubia, “Diffusion-based placement migration,” in Proceedings. 42nd Design Automation Conference, 2005., pp. 515–520, 2005.
[13] D. Hill, “Method and system for high speed detailed placement of cells within an integrated circuit design,” U.S. Patent 6,370,673, Apr. 2002.
[14] P. Spindler, U. Schlichtmann, and F. M. Johannes, “Abacus: Fast legalization of standard cell circuits with minimal movement,” in Proceedings of the 2008 International Symposium on Physical Design, ISPD ’08, (New York, NY, USA), p. 47–53, Association for Computing Machinery, 2008.
[15] G. Wu and C. Chu, “Detailed placement algorithm for vlsi design with double-row height standard cells,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 35, no. 9, 2015.
[16] Y. Lin, B. Yu, X. Xu, J.-R. Gao, N. Viswanathan, W.-H. Liu, Z. Li, C. J. Alpert, and D. Z. Pan, “Mrdp: Multiple-row detailed placement of heterogeneous-sized cells for advanced nodes,” in 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1–8, 2016.
[17] C. Wang, Y. Wu, J. Chen, Y.-W. Chang, S. Kuo, W. Zhu, and G. Fan, “An effective legalization algorithm for mixed-cell-height standard cells,” in Proc. of Asia and South Pacific Design Automation Conference, pp. 450–455, Jan 2017.
[18] J. Chen, Z. Zhu, W. Zhu, and Y.-W. Chang, “Toward optimal legalization for mixed-cell height circuit designs,” in 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), pp. 1–6, 2017.
[19] Z. Zhu, X. Li, Y. Chen, J. Chen, W. Zhu, and Y.-W. Chang, “Mixed-cell-height legalization considering technology and region constraints,” in 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1–8, 2018.
[20] C.-H. Wu, W.-K. Mak, and C. Chu, “Linear-time mixed-cell-height legalization for minimizing maximum displacement,” in Proceedings of the 2022 International Symposium on Physical Design, ISPD ’22, p. 211–218, 2022.