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研究生: 黃智翔
Chih-Hsiang Huang
論文名稱: 網路交換處理器之爪哇編譯器
Compilers for IXP Network Processor
指導教授: 李政崑
Jenq-Kuen Lee
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Computer Science
論文出版年: 2006
畢業學年度: 94
語文別: 英文
論文頁數: 1冊(56面)
中文關鍵詞: 編譯器目的機器描述機制編譯器移植英特爾網路交換處理器網路處理器程式語言爪哇編譯器
外文關鍵詞: compiler system, machine description, compiler porting, Intel IXP, network processor, language, Java compiler
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  • 隨著網路技術的日新月異,網路的流量已經不是以往的網路設備可以負荷,取而代
    之的就是新一代的網路處理器。Intel的網路處理器IXP是新一代解決網路封包處理
    的處理器,不僅可以滿足大量的封包處理更表現優秀的處理效能。IXP有許多硬體
    上的特色,在程式設計上需要有相當的專業知識才能有效撰寫程式碼。

    這篇論文中,目的是要提供在IXP上的Java程式語言,有別於IXP本身提供的程式設
    計開發工具,論文中提供還未問世的Java front-end,提供一個有別於以C語言為基
    礎的物件導向程式語言,另外,由於Java物件導向語言在處理執行緒的管理以及分
    散式的電腦架構下,都有相當便利的程式撰寫環境,因此,在IXP上提供Java的程式
    開發設計環境將可以提供網路程式撰寫的另一個替代解決方案。

    論文中,我們選用GCC來支援產生IXP上的組合語言程式碼,GCC不僅擁有許多特殊架
    構可以讓開發者有效地修改而產生所需的目標機器上的程式碼,更因為他遵守GNU的
    授權文件,所以開發者可以因需求任意修改。由於Intel隨機所給予的開發工具程式
    不是開放源碼也沒有提供機器碼的文件,所以論文中先將Java程式碼轉換為IXP的組
    合語言程式碼,在利用所付的開發工具程式將其轉換為可執行碼到實際機器上去測
    試。

    在實驗中,我們實做一個以C為主的編譯器,來編譯C程式碼到IXP的組合語言程式碼,
    這是因為這樣的流程需要修改machine description檔案,而這個檔案不管GCC所支援
    的程式語言為何,都是使用同一份GCC原始碼,如此可以更方便在實做上除錯的時間。
    在論文中,將會有範例來展示這個實驗的結果。


    As huge improvement of internet infrastructure in the recent decade, people gain much more convenience on those high-speed
    communication and data transformation from internet than in 90’s. Network processor is a new computer architecture which
    is designed for nowadays high throughput network data processing, which is mainly composed of a core-processor and
    multiple co-processors with hierarchical memory system. This kind of complex system communicates with variety of memory
    architecture could make packet processing jobs separated to different mutual exclusive ones and processed by each computing
    units synchronously and as fast as possible. Each computing unit is supposed to run a component, which we call it PPF
    (packet processing function) in a packet processing flow to make sure every packet is processed in an efficient way.
    Intel’s network processor (Internet eXchange Processor, IXP) is the perfect example allows a single stream packet/cell
    processing problem to be integrated into multiple, sequential, and synchronous tasks that can be linked together
    easily. It has one XScale processor and multiple RISC processors called “micro-engines” which allows network
    application processed in simultaneous methods. Network applications shall be separated in several different tasks.

    In this paper, we bring up a solution using the approaches to emphasize on enabling Java programming languages over IXP
    network processors to make a good model for compilers over multi-core architectures.
    Previous work about multi-core compilers over IXP is the IXA Software Development Kit which supports only C front-end
    and must be tuned by human efforts. In this paper, I propose a neat interface for users to program Intel IXP network
    processors without considering about hardware details. Also, by the convenience of GNU Compiler Collection, programmers
    on Intel IXP could easily use this tools to help program the network application on IXP.

    Acknowledgements i Abstract iii Contents v List of Figures vi List of Tables vii 1 Introduction 1 1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 Thesis Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.3 Porting GNU Compiler Collection . . . . . . . . . . . . . . . . . . . . 3 2 Intel IXP 2400 Network Processor 5 2.1 Evolution of Network System . . . . . . . . . . . . . . . . . . . . . . 5 2.1.1 First Generation Network System . . . . . . . . . . . . . . . . 6 2.1.2 Second and Third Generation Network System . . . . . . . . . 8 2.1.3 Network Processor . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Introduction to IXP 2400 Network Processor . . . . . . . . . . . . . . 11 2.2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.2 External Connections . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.3 Intel XScale Core . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.4 Microengines . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2.5 Other Functional Units . . . . . . . . . . . . . . . . . . . . . . 17 2.2.6 A Day In The Life of A Packet . . . . . . . . . . . . . . . . . 18 3 GNU Compiler Collection 22 3.1 Cross Compilation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.2 Basic Structure of GCC . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.3 Machine Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.3.1 The ’.md’ file . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.3.2 Target DescriptionMacros . . . . . . . . . . . . . . . . . . . . 31 4 Compiler Implementation 32 4.1 System Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.2 Difficulties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.3 Machine Description Implementation . . . . . . . . . . . . . . . . . . 35 4.4 Example of Produced Assembly Codes . . . . . . . . . . . . . . . . . 38 5 Conclusion 42 5.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 5.2 FutureWork . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Bibliography 44

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