近年來由於攜帶式的電子產品持續發展，sysetm-on-chip (SoC) 一直是發展的重點之一。然而在這樣的應用下，如何去整合不同元件和個別所需要的電源系統(Power IC)在同一顆晶片上，便是一大挑戰，所以我們期待能設計一個穩壓器，它能具備快速動態輸出的功能，和有效地電源管理，使整體運作能達到最佳化。

在傳統穩壓器中，由於迴圈的特性會隨著負載不同而有所變化，為了確保不同負載下的穩定度，頻寬必定會遭受到限制，導致暫態方面的特性隨之受限。因此我們期望能克服傳統架構上會遇到的瓶頸，使得穩壓器能達到高頻寬的特性，同時實現好的暫態響應。此論文將著重在設計一個整合性的穩壓器，並具備及時動態追蹤的特性，甚至可以在需要的時候進入待命狀態。

這次的研究將會利用replica bias的概念來做為基礎。藉著兩種迴圈的設計，使追蹤參考電壓的迴圈不受到負載的不同而有所變化，避免頻寬遭受限制，達到快速追蹤參考電壓的目的，同時提供另一迴圈一個穩定的偏壓值，此迴圈負責的是追蹤負載電流的情形，迅速的控制Power MOS提供的電流源，以維持輸出電壓的穩定狀態，藉由這樣的機制，以實現穩定的AC特性和快速的暫態響應之目的。我們期望它能夠快速的動態提供負載所需求的電壓值，且可以快速在主動模式和待命模式間做切換，使後端系統運作能有效地運作。此整合性穩壓器採用TSMC 0.18um製程來實現，可提供1.2V~1.5V輸出，具備120mV低壓降的特性，且如預期地完成快速動態輸出的功能。除此之外，此架構同時也可實現在0.13um製程上，可動態的提供0.9~1.2V輸出，提供負載系統不同的需求。

To guarantee the loop stability, the bandwidth of the conventional linear regulator is limited since the load current is not fixed. We expect to overcome the bottleneck so that the regulator can process high bandwidth and good transient response at the same time. The research demonstrates that an integrated LDO linear regulator with fast dynamic output. The design is suitable for SoC applications because it can help the integration of elements and their power devices and the optimization
of system operation.

The regulator design employs a replica-biased feature. By using two loops, we achieved a regulator with good AC response and fast transient response. It can provide multiple output voltages for different requirements of loads, and can be switched fast between active mode and suspend mode. The regulator was fabricated in a 0.18 μm CMOS technology with output voltages from 1.2V to 1.5V and a 120mV dropout voltage.

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