本論文描述了一個使用飛行時間法(ToF)並採用連續性波長調變的方式可應用於三維影像實現之深度影像感測器，利用信號等化以及多次子積分的技術來達到雜訊抑制和背景光抑制範圍延展的效果。一個64×128的影像感測器以此架構技術實現後，其量測的結果在影像之表現有67%固定模式雜訊(FPN)抑制以及300μV隨機雜訊消除的效果，同時具備有30fps的幀率(frame/sec)使其成為一個具有相當雜訊抑制能力之三維深度影像感測器。此影像感測器包含了兩種像素陣列作為兩種不同像素架構之性能比較，整個系統周邊包含以每條欄方向共用之交換電容式差動放大器、取樣電路，以及控制訊號讀出之欄、列編碼器，像素間距為10μm，每個像素包含有9個電晶體，填充因子為24.8%，使用了TSMC 0.11μm CIS 1P4M影像感測器製程，晶片大小為2.2mm×2.5mm。
此論文所貢獻之創新技術以概述如上，首先是提出了一個創新且具有kTC雜訊消除(RNC)及FPN壓抑技術的訊號等效讀出方法，利用四電晶體畫素等化器使其在多次相位訊號積分過後，將兩個訊號儲存點電壓等效至同一電位的方式,取代傳統類似3T-APS將訊號積分點拉回重置電壓的偽相關二次取樣方法，此技術可確實消除了在不同訊號環境之應用下所造成的重置電壓雜訊，藉此改善影像的均勻度，並且可省去了後端訊號處理所需相關二次取樣電路,事實上在此傳統架構下CDS並無法確實達到消除雜訊的效果，第二為利用多次子積分的方式來達到比較高的背景光抑制能力，第三為採用欄共用式運算放大器，用於補償在傳統主動式畫素影像感測器中因像素內部之源級隨偶器所造成的增益損耗，並且在欄訊號讀出前採用了訊號取樣的電路，藉此達到在幀影像訊號讀取時間內，節省了90%的放大器功率損耗，達到省電的效果。

This thesis describes a Time of flight (ToF) technology with continuous wave modulation scheme applied in three domination (3D) CMOS imager sensors. Using integration signal equalization and sub-integration technology achieve noise cancellation and background light suppression (BLS) ability extension. A prototype 64×128 pixel imager employed these schemes experimentally achieve 67% fixed-pattern-noise (FPN), 300μV kTC noise cancelled and 30 fps in the 2D image mode. The imager implements two different pixels array compared between the image performances. The full chip system consists of their associated column parallel differential switched-capacitor OPAMP, S&H circuits, column and row decoders, enabling a pixel pitch of 10μm with nine transistors in a pixel, 24.8% fill factor in a TSMC 0.11μm CIS process, the chip size is 2.2mm×2.5mm.
The innovations are contributed by this thesis, leading to the performance outlined above. First, a novel 4T in-pixel equalizer with reset noise cancellation (RNC) scheme which equal the signal after multiple integrated in two storage points. Compare to the 3T-like signal readout in conventional ToF imager which the integration points will be reset to the high voltage in the reset signal sample phase and therefore inject the thermal noise. The new technology cancels the reset noise caused by the reset MOSFET threshold variation and kTC noise. This operation improves the uniformity of imager at different exposure environments. The commonly readout circuits of the correlated double sampling (CDS) circuit can be omitted; in fact the CDS is pseudo operation in noise cancellation. Second, a sub-integration method for giving a wide dynamic range of background light suppressed ability. Third, the fully differential switched-capacitor OPAMP with sample and hold circuits are used in column-wise circuits for compensating the gain loss caused by the source follower in conventional active pixel sensors and reduced about 90% power consumption from the column shared OPAMP in the signal readout period, reaching good power efficiency.

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