晶圓針測為晶圓製造的流程之一，當晶圓片製造完成後，會透過探針卡(probe cards)確認晶圓有無瑕疵，然而隨著製程之複雜度、元件整合度越高，測試困難度亦將大幅提高，進而影響檢測效率、廠商利潤。本研究探討晶圓檢測優化問題，並分析兩個有交互作用的子問題 (subproblem)，即集合覆蓋問題 (set-covering problem (SCP))和旅行商問題 (traveling salesman problem (TSP))。集合覆蓋問題為探針卡踩在晶粒(die)上以檢測晶圓有無瑕疵。旅行商問題則根據SCP求出的探針卡移動策略進而求得檢測迴路(tour)。為了解決此晶圓檢測問題，本研究提出兩種解決方案策略：兩階段(two-phase)及分枝界線法(branch-and-bound-based (B&B))。從數值結果可知，B&B 方法可以找到最佳解，而兩階段求解方法可以有效率地找出可行解，相較兩階段法，在檢測迴路方面最高有26.65%之改善。此外還發現檢測性能因所使用探針卡的尺寸和設計而異。大型及對稱的探針卡可以更高效地檢測晶圓，因此普遍來說是更佳的選擇。最後，透過B&B可以確定SCP和TSP的目標值權衡，說明兩個目標值不一定是正相關。

The wafer inspection problem aims to efficiently examine wafers with probe cards during the semiconductor manufacturing process so that defective wafers can be identified. In this study, we investigate the wafer inspection problem and analyze it as two interactive subproblems, namely the set-covering problem (SCP) and traveling salesman problem (TSP). The SCP determines the dies a probe card should step on so that the dies in a wafer can be adequately examined. The TSP identifies the inspection tour of the probe card based on the stepping strategy given in the SCP. To solve this wafer inspection problem, two solution strategies are explored: two-phase and branch-and-bound-based (B&B) approach. Numerical results show that the proposed B&B approach can identify the optimal solution, while the two-phase solution approach can efficiently identify feasible solutions. Specifically, the improvement rate of the tour cost in B&B can be as high as 26.65% compared to two-phase method. Furthermore, it is found that the inspection performance varies due to the size and design of the probe card used. Larger and symmetric probe cards can result in more efficient and effective inspection results and are thus preferable choices. Finally, with the B&B, we can determine the tradeoff of the objective values of the SCP and TSP, indicating that these two values are not necessarily positively correlated.

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