二值化神經網路是卷積式神經網路的一種變形，其不同之處在於二值化神經網路
中的神經元是二進制的權重和二進制的輸出。此種網路近年來成為了在資源有限
的設備上部署人工智慧的一種具前景的方法。由於二值化權重的特性，二值化神
經網路在計算上不再需要乘法器，並且過濾器之間也有著較高程度的相似性。在
這篇論文中，我們提出了一種利用部分過濾器間重複的特性的方法，並將此方法
與目前最先進的技術做結合，以減少在現場可程式化邏輯閘陣列(FPGA)上實現
所需的硬體成本和合成時間。

Binarized Neural Network (BNN), which is a variant of Convolutional Neural Network (CNN) with binary weights and binary outputs on a neuron, has emerged as a promising approach to deploy artificial intelligence on resource-restricted devices in recent years. Due to the binarized weights, there are no longer required multipliers for computation, and there exist relatively high similarities among filters as well. In this work, we propose a partial-filter sharing approach and integrate it with the state-of-the-art to reduce the hardware cost and the synthesis time onto Field Programmable Gate Arrays (FPGAs). Experimental results show the effectiveness of our approach in terms of look-up table (LUT) counts and synthesis time on an FPGA platform. As compared to the state-of-the-art, the LUT reduction rate by our approach is 42.6% on average without any accuracy loss, and 38.9% synthesis time can be also saved on average.

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