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研究生: 王振展
Chen Chan Wang
論文名稱: 鑲崁有金奈米晶粒之金屬-氧化物-半導體電容器之非揮發記憶特性研究
Investigation of the memory characteristics of metal-oxide-semiconductor capacitors embedded with Au nanocrystals
指導教授: 吳泰伯
Tai-Bor Wu
口試委員:
學位類別: 博士
Doctor
系所名稱: 工學院 - 材料科學工程學系
Materials Science and Engineering
論文出版年: 2007
畢業學年度: 95
語文別: 英文
論文頁數: 146
中文關鍵詞: 奈米晶非揮發記憶體
外文關鍵詞: Au, nanocrystals, non-volatile memory
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  • 本論文是有關金屬-氧化物-半導體(MOS)結構中鑲崁有金奈米晶粒的非揮發記憶特性有著詳盡的探討。在經過一個適當的退火溫度後,原本存在於閘極氧化層中的金薄膜可以自行組裝成具有均勻粒徑分布的金奈米晶粒。我們可以在電容-電壓的關係圖中發現一個明顯的遲滯(hysteresis)曲線,此現象來自奈米晶粒的電荷儲存效應。 此外,藉由不同掃描速率的電容-電壓量測可發現兩種被捕捉的載子(電子和電洞) 擁有不同的充電速率。
    以金奈米晶粒為基礎的非揮發性記憶體可以藉由高介電(high-k)材料的引入改善其效能。其中,以原子層沉積技術製備氧化鋁作為控制氧化層可提升記憶胞的抹除速度已在本論文得到驗證。此外,以鈦酸鍶鋇(BST)取代金奈米晶記憶體中的控制氧化層在本論文亦有所探討。存在於鈦酸鍶鋇/二氧化矽的層狀結構中的金奈米晶粒在熱處理的過程會使得部份的金的熔入周圍的鈦酸鍶鋇之中而形成一層金摻雜鈦酸鍶鋇外殼存在於的金奈米晶粒外殼。除了金摻雜鈦酸鍶鋇外殼的形成以外,鈦酸鍶鋇的能隙(energy gap)亦會因金的熔入而提高,因此閘極氧化層中的漏電流可被減低。此外,由於電荷儲存於金奈晶粒中而形成的內建電場會因高介電的鈦酸鍶鋇外殼的屏蔽而降低,所以在穿遂氧化層中的直接穿遂(direct trunneling)效應會被抑制,因此,金奈米晶記憶體的記憶能力(retention)可被改善。
    在本論文中亦探討了以原子層沉積法鍍制的高介電材料作為閘極氧化層的金奈米晶記體的電荷儲存特性。以氧化鋁(Al2O3) 作為閘極氧化層相較於使用氧化鉿鋁(Hf2AlOx) 的金奈米晶記憶體具有一符合需求的記憶能力(retention)。此外,我們亦在此一金氧半電容器中觀察到電子飽和儲存的現象。


    The non-volatile memory characteristics of metal-oxide-semiconductor (MOS) structures embedded with Au nanocrystals in the gate oxide were studied in this thesis. The Au nanocrystals with a narrow size distribution can be self-assembed from the agglomeration of an ultrathin Au layer inserted in the gate oxide by annealing at a suitable temperature. A clear hysteresis loop is found in the capacitance-voltage (C-V) relation, indicating its significant charge storage effect. Moreover, different charging rate for two kinds of trapped carriers (electron and hole) was found from C-V measurement under various scan rates.
    With the use of high-k materials, the performance of Au-nanocrystals-based non-volatile memory can be improved. Among them, we have demonstrated that the use of Al2O3 as control oxide prepared by atomic-layer-deposition enhances the erase speed of the memory cells. In addition, the use of (Ba0.5Sr0.5)TiO3 (BST) as the control oxide in a Au-nanocrystals-based memory structure was also investigated. The Au nanocrystals, surrounded with a core shell of Au-doped BST, were self-assembled in the BST/SiO2 stack. The leakage of the gate oxide is reduced due to the partial dissolution of Au into the BST matrix, which enlarges the energy band-gap of BST. Moreover, direct tunneling through the tunnel oxide is suppressed because the internal field induced by the charges in the Au nanocrystals can be screened by the ultrahigh-k shell of BST. Therefore, the retention property of the Au-nanocrystals-based memory structure is improved.
    The charge storage characteristics of MOS structures containing Au nanocrystals in atomic-layer-deposited high-k gate dielectrics were also studied in this thesis. A satisfactory charge retention characteristic was obtained for the sample employing Al2O3 as the gate dielectric compared to that using Hf2AlOx as the gate dielectric. Moreover, a saturation of electron storage in the MOS capacitors was also observed.

    摘要………………………………………………………………. I Abstract………………………………………………………….. III Contents…………………………………………………………. V List of Tables…………………………………………………. XIII List of Figures……………………………………………….. XIV Chapter 1 Introduction……………………………………….. 1 1.1 Emerging nonvolatile memories….…………………….. 1 1.1.1 FeRAM (Ferroelectric Random Access Memory)……. 1 1.1.2 MRAM (Magnetic Random Access Memory)…………... 3 1.1.3 PCRAM (Phase Change Random Access Memory)………. 8 1.1.4 RRAM (Resistive Random Access Memory )………. 11 1.1.5 Nanocrystal Memory……………………………………. 12 1.2 The challenge with floating gate memory......... 14 1.3 Motivation and objectives of research............ 16 Chapter 2 Background study………………………………... 19 2.1 Overview of semiconductor memories…………………… 19 2.1.1 Volatile RAM (Random Access Memory)…………… 20 2.1.2 Non-volatile ROM (Read-Only Memory)……………. 23 2.2 Physical aspects of operation and reliability in nanocrystal-based non-volatile memory ........ 35 2.2.1 Programming/erasing mechanisms…………………. 35 2.2.2 Reliability issues of nanocrystal memories…… 42 2.2.3 Other related issues of nanocrystal memories.… 45 Chapter 3 Experimental procedures……………………. 50 3.1 Devices fabrication……………………………………. 50 3.1.1 RCA clean……………………………………………… 51 3.1.2 Back-side ion implantation………………………. 52 3.1.3 Deposition of tunnel oxide………………………. 53 3.1.4 Deposition of a Au ultrathin film……………… 55 3.1.5 Deposition of control oxide……………………… 55 3.1.6 Au nanocrystal formation………………………… 58 3.1.7 Metallization………………………………………… 59 3.2 Analysis and measurement…………………...…... 60 3.2.1 Structural analysis……………………………….. 60 3.2.2 Chemical analysis…………………………………... 61 3.2.3 Electrical measurement…..……………………… 61 Chapter 4 Charging characteristics of Au-nanocrystals embedded in metal-oxide-semiconductor structures..................................... 63 4.1 Introduction……………………………………………… 63 4.2 Experimental…….……………………………………… 64 4.3 Results and discussion………………………………… 65 4.3.1 Structural anlysis………………………………….. 65 4.3.2 Chemical anlysis…………………..……………. 67 4.3.3 Charge storage effect (memory effect) in capacitance-voltage relations…............................ 69 4.3.4 Current-voltage characteristics…………...…… 72 4.3.5 Charge retention characteristics………………… 73 4.4 Conclusion………………………………………………… 75 Chapter 5 Memory characteristics of Au nanocrystals embedded in metal-oxide-semiconductor structure by using atomic-layer-deposited Al2O3 as control oxide…………………............................ 76 5.1 Introduction………………………………….………… 76 5.2 Experimental ……………..…………………………… 77 5.3 Result and discussion…………………..…………… 79 5.3.1 Structural analysis……………………………… 79 5.3.2 Chemical analysis…………………………………… 81 5.3.3 Charge storage effect (memory effect) in capacitance-voltage relations………………………......………. 82 5.3.4 Erased speed…………………………………………….. 84 5.3.5 Current-voltage characteristics…………………. 85 5.3.6 Charge retention characteristics…………..……… 88 5.4 Conclusion………………………………………………… 90 Chapter 6 Improvement in charge retention in Au-nanocrystals-based memory structures by employing (Ba0.5Sr0.5)TiO3 as control oxide……............................................. 92 6.1 Introduction………………… ….……………………… 92 6.2 Experimental ……………..……………………...……… 93 6.3 Results and discussion…………………………………… 94 6.3.1 Structural analysis………………………………… 95 6.3.2 Charge storage effect (memory effect) in capacitance-voltage relations………………………...........……… 97 6.3.3 Current-voltage characteristics………………… 99 6.3.4 Charge retention characteristics………………… 101 6.4 Conclusion.………………………………………………… 104 Chapter 7 Charge storage characteristics of Au nanocrystals embedded in high-k gate dielectrics on Si……………… 104 7.1 Introduction………………………………….……………… 104 7.2 Experimental ……………..…………………………… 105 7.3 Results and discussion………………………………… 107 7.3.1 Structural analysis………………………………… 107 7.3.2 Charge storage effect (memory effect) in capacitance-voltage relations………………………...………......... 110 7.3.3 Charge retention characteristics…………………… 119 7.4 Conclusion.……………………………………………… 120 Chapter 8 Summary………………………………………………. 121 Chapter 9 Prospects in the future…………………..……. 123 Reference………………………………………………………… 126

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