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研究生: 婁經雄
論文名稱: 600V垂直式CoolMOS的設計
The Design of 600V Vertical CoolMOS
指導教授: 董傳義
T.Y.Dung
龔正
J.Gong
口試委員:
學位類別: 碩士
Master
系所名稱: 原子科學院 - 工程與系統科學系
Department of Engineering and System Science
論文出版年: 2005
畢業學年度: 93
語文別: 中文
論文頁數: 69
中文關鍵詞: 垂直式雙擴散金氧半場效電晶體崩潰電壓
外文關鍵詞: CoolMOS
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  • 傳統的VDMOSFET(垂直式雙擴散金氧半場效電晶體) 在高壓應用時,必須降低漂移區的摻雜濃度及提升厚度,相對的也增加導通電阻(Ron),且關係為RON~BV2.5,也就是所謂的矽的極限。但Power MOSFET必須擁有高速切換速度及低功率損失的特性,因此傳統的VDMOSFET在600V以上的應用時,其導通電阻會受到漂移區的摻雜濃度與厚度的限制。這個問題在1998年,一個應用super-junction理論的新型功率元件- CoolMOS的發明後得到了解答。根據super-junction理論,CoolMOS的漂移區濃度可以比VDMOSFET提高十倍以上,導通電阻改善五倍,同時不影響崩潰電壓。
    在本篇論文中,我們將依據super-junction理論設計出一個額定電壓為600V的CoolMOS,並對這個CoolMOS的電性進行研究探討。


    Conventional VDMOSFET (Vertical Double diffused Metal Oxide Semiconductor Field Effect Transistor) technology for power devices was constrained by the Silicon Limit. This is now improved to have linear relation between on resistance (Ron) and breakdown voltage(BV) instead of the quadratic relation. In 1998, for the first time the new device concept for high voltage power devices which is called super-junction theory has been realized in silicon. We have designed SJ-layer based on this theory in this thesis and used it to construct the SJ-MOSFET : CoolMOS structure. The claim of the theory that the doping level of the drift region can be increased by at least one order of magnitude, at least 5 times improvement in on resistance without reducing the BV. The effect of charge imbalance created due to the neck region of power MOSFET is also investigated in the thesis.

    第一章 前言........................................1 第二章 元件的發展與回顧............................4 2.1功率金氧半場效電晶體的發展演化....................4 2.2 VDMOSFET的結構...................................7 2.3 VDMOSFET的發展...................................9 2.4 CoolMOS的結構...................................10 2.5 CoolMOS的發展...................................10 第三章 元件的操作原理.............................19 3.1元件崩潰的原理...................................19 3.1.1 累增崩潰(avalanche breakdown) ..............20 3.1.2 游離係數(ionization coefficient) ...........20 3.1.3 增值係數(Multiplication coefficient) .......21 3.2 Power MOSFET的操作原理..........................23 3.3元件的導通電阻...................................24 3.4傳統VDMOSFET的BV與RON的關係......................25 3.5 CoolMOS的BV與Ron的關係(SJ的原理) ...............26 3.6 CoolMOS的設計方法...............................28 3.7淨電荷平衡(charge balance) ......................29 第四章 元件的模擬與設計...........................33 4.1傳統VDMOSFET的模擬設計...........................34 4.1.1 VDMOSFET的結構模擬..........................34 4.1.2 VDMOSFET的電性模擬..........................37 4.2 CoolMOS的模擬設計...............................38 4.2.1 CoolMOS的結構模擬...........................38 4.2.2 CoolMOS的電性模擬...........................41 4.3改進CoolMOS的設計與模擬..........................42 4.3.1元件尺寸(cell pitch) ........................42 4.3.2電荷平衡(charge balance)的模擬...............43 4.3.3 漂移區濃度的模擬...........................45 4.3.4 總結........................................46 第五章 結論.......................................64 參考文獻............................................65

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