As the number of cores on a chip increases, the design of network-on-chip (NOC) is becoming critical and challenging. A common practice to exploit the design space and evaluate the performance of NOC is to perform trace-driven simulation. Trace-driven simulators are relatively easy to develop and run faster, which allow fast evaluations of different design options. Unfortunately, traces are often generated by some specific machines or emulators, and contain limited information, e.g., when a message is injected from where. When applied to evaluating new architectures, these traces might not conform to the characteristics of the new architectures, leading to inaccurate simulation results.

The primary reason why current traces could not adapt and conform to the architecture under study is because they do not retain causality relationships of events, and thus the semantics of the execution. In this thesis, we propose a new methodology for trace-driven simulation of NOC. The methodology incurs two phases. The first phase generates rich traces, called intermediate representation (IR), which records the execution behavior of target applications by tracking the happen-before relations of computations and communications. In the second phase, the IR is adapted to produce traces that match the architecture to be studied. This in essence synthesizes new and matching NOC traces for the target architecture. Our evaluation on the Tilera’s TILE64 platform shows that the proposed methodology achieves an average 3% error compared to true machines, while current practices would incur 80% to 300% errors compared to ground truth.

論文摘要
伴隨著晶片上處理器核心數的增加，晶片網路系統(NOC)的設計變得嚴峻且有挑戰性。我們通常使用追蹤驅動模擬的方法來設計硬體和測量整體效能。追蹤驅動模擬器對於硬體設計考量上提供比較快的模擬速度，而且也比較容易去發展。但是追蹤紀錄(trace)通常是在某一台機器或模擬器產生，而且包含有限的資訊像是一個訊息是從哪裡被注入晶片網路系統。當我們把某一台機器或模擬器產生的追蹤紀錄應用到一個新的硬體架構，這些追蹤紀錄也許不能確保新的硬體平台的特性，進而導致不精準的模擬結果。
現今的追蹤紀錄為什麼不能適應和確保硬體架構的特性，最主要的理由是不能確保程式執行時事件間的因果關係。在這篇論文裡，我們對於追蹤驅動模擬提出了一個新的方法。這個新的方法主要包含兩個階段。第一個階段產生豐富的追蹤紀錄，我們稱之為中介表示(IR)。這個中介表示利用追蹤處理器運算和通訊的因果關係，紀錄下目標程式執行的程式行為。在第二個階段我們利用中介表示根據硬體架構去產生對應的追蹤紀錄。這個方法有效的針對目標硬體架構合成出對應的晶片網路追蹤紀錄。我們的實驗在Tileras TILE64平台實作，根據實驗的結果我們的方法與真正的機器跑出來的結果只有3%的相對誤差，目前的方法跟真正的機器跑出來的結果相比卻有80~300%的誤差。

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