在本論文裡，我們使用原子層化學氣相沉積(Atomic Layer Deposition, ALD)技術搭配遠端電漿系統於鍺基板上鍍製高介電材料。
在第三章中，在氧化鉿/氧化鑭/p型鍺和n型鍺疊層結構中，我們探討在固定厚度下，不同比例的氧化鑭對於材料和電性特性的影響。根據實驗顯示在氧化鉿/鍺元件中插入一層氧化鑭可以改善其表面和電性特性。除此之外，我們鍍製更薄的鉿鑭氧化物來微縮等效氧化物厚度(Equivalent Oxide Thickness, EOT)，當厚度降至4奈米時，最低的EOT值可以微縮到1.08奈米
在第四章中，我們成功的使用遠端電漿ALD系統中的氮/氫/氬電漿表面處理鍍製出氧化鉿/氧化鑭高介電閘極氧化層。而介面中的鑭鍺氮氧化合物和鍺的外擴散現象也同時被X射線光電子能譜(XPS)和透射電子顯微鏡(TEM)給驗證。擁有極薄鑭鍺氮氧化合物的高介電元件表現出良好的電性特性，包括更大的介電值、更小的EOT、更低的漏電電流、更小的C-V遲滯窗口和更低的表面狀態密度。這是因為鑭鍺氮氧化合物可以有效的抑止鍺擴散至高介電元件中進而改善界面的特性。
而在第五章中，我們鍍製氧化鈦-氧化鋁-氧化鑭疊層結構，透過不同的排列方式來探討氧化物的位置對於鍺金氧半元件的特性影響，而高介電氧化物的位置可以透過ALD精準的控制。結果中顯示，當氧化鑭當作和鍺的接觸層、當氧化鋁當作阻隔層來抑制鍺的外擴散和利用氧化鈦的高介電常數來微縮EOT，在這樣的排列組合下，我們可以利用各氧化物的各種優點同時得到最好的電性特性。
最後，在第六章中，我們使用遠端電漿ALD系統中的原位循環水氧電漿製備氧化鉿和水氧電漿表面處理鍺基板表面。經過循環和表面水氧電漿處理的試片明顯表現出比沒有處理的試片擁有更好的電性特性，其中包括更高的電容值、更低的EOT和更低的漏電電流。這都因為高品質的氧化鉿和高品質的界面所致，水氧表面電漿處理可以去除殘留的原生氧化層和產生更多的表面化學吸附位置來形成更好的界面；另一方面，循環的水氧電漿處理可以生成更純更緻密的氧化鉿薄膜，因此可以抑止鍺外擴散至氧化鉿薄膜中。

In this thesis, we use the atomic-layer-deposition (ALD) technique with remote-plasma system to prepare high-κ dielectrics on Ge substrate.
In Chapter 3, the HfO2/La2O3/p-Ge and n-Ge stacks were deposited as gate dielectric to discuss the effect on material and electrical properties of different La2O3 ratio in fixed thickness. It shows that insertion of a La2O3 layer at the HfO2/Ge interface improves the interfacial and electrical properties of HfO2/Ge MOS devices. Moreover, we fabricated thin HfO2/La2O3/Ge devices for scaling down the EOT. The lowest EOT we achieved is down to 1.08 nm while thickness reduces to about 4 nm.
In Chapter 4, in-situ N2/H2/Ar plasma surface-nitridation treatment on p-type Ge (100) with HfO2/La2O3 high-κ gate oxide was investigated by remote rf plasma on radical-assisted atomic layer deposition (RAALD). The interfacial LaGeOxNy formation and Ge outdiffusion were also investigated by X-ray Photoelectron Spectroscopy (XPS) and transmission electron microscopy (TEM). The high-κ MOS device with an ultrathin LaGeOxNy interlayer shows good electrical characteristics, including larger κ value, smaller equivalent oxide thickness, lower leakage current density, smaller C-V hysteresis, and lower interface-state density. The involved mechanism lies in that the LaGeOxNy interlayer can effectively block the diffusion of Ge, thus improving the high-κ films/Ge interface quality.
In Chapter 5, we fabricated 8 nm thick TiO2-Al2O3-La2O3 stack structure with different arrangement to investigate the oxide location effect the Ge MOSCAPs properties. The location of high-κ layers were accurately controlled by atomic layer deposition (ALD). From the results, we found that the La2O3 be the contact layer with Ge substrate, Al2O3 be the blocking layer to suppress the Ge outdiffusion and TiO2 be the higher-κ layer on the top to reduce the EOT. In this arrangement, we could take all advantages of high-κ oxides and get the best electrical properties.
Finally, in Chapter 6, we fabricate cyclic D2O plasma treatments on HfO2 films and surface D2O plasma treatment on p- Ge (100) substrate by radical-assisted atomic layer deposition (RAALD). The samples with cyclic and surface D2O plasma treatments show better electrical properties than the sample without treatment, because of higher quality of HfO2 films and better surface quality. It shows higher capacitance density, lower equivalent oxide thickness (EOT) and lower leakage current density, respectively. The mechanism lies in that D2O radical pre-treatment remove native oxide and D2O chemisorption sites to form better surface quality. On the other hand, in-situ cyclic D2O radical anneal could form purer and denser HfO2 to suppress Ge diffusion through HfO2 films.

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