研究生: |
鍾紹仁 Shao-Jen Chung |
---|---|
論文名稱: |
基於嵌入式DSP的MP3解碼器的最佳化 Optimization of MPEG Audio Decoder for Embedded DSP Core |
指導教授: |
吳仁銘
Jen-Ming Wu |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 產業研發碩士積體電路設計專班 Industrial Technology R&D Master Program on IC Design |
論文出版年: | 2007 |
畢業學年度: | 95 |
語文別: | 英文 |
論文頁數: | 99 |
中文關鍵詞: | MP3 最佳化 、MP3 解碼器 、嵌入式 DSP |
外文關鍵詞: | MP3 optimization, MP3 decoder, Embedded DSP |
相關次數: | 點閱:60 下載:0 |
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本篇論文是針對基於嵌入式DSP的MP3解碼器做最佳化,並將最佳化後的MP3解碼器移植到嵌入式DSP核心的平台上完成MP3解碼,同時本論文最佳化的MP3解碼器也可以做為驗證DSP軟體模擬器及DSP硬體核心的功能正確性及一致性的應用程式。而MPEG 音訊解碼器是今日非常流行的數位音訊壓縮技術,它可應用於像MP3播放器及行動手機一樣的行動小型裝置,且MPEG 音訊解碼器的演算法為完全定點式運算,因此本論文是以MPEG 音訊解碼器作為MP3解碼器來做最佳化。本論文在基於嵌入式DSP架構上對MPEG 音訊解碼器作最佳化,在解碼速度上改善了48%,而在程式碼太小上也改善了30%,因此能縮短其驗證DSP核心的時間及有助於做即時MP3解碼的實現。
本論文一開始會先對MP3編碼器的理論做簡介,接下來說明我們如何對MPEG 音訊解碼器做最佳化的方法及程式的改寫,接下來我們會說明我們如何把MPEG 音訊解碼器移植到新華電腦的PreSOCes平台,以及說明如何把移植到PreSOCes平台成功的MPEG 音訊解碼器再移植到嵌入式 DSP 模擬器,接下來我們會說明如何將我們最佳化完的MPEG 音訊解碼器來驗證嵌入式 DSP 硬體核心,並且把驗證完的DSP核心和最佳化的MPEG 音訊解碼器移植到FPGA的平台(UMVP-2000,創意電子)來執行,最後,我們會把展示說明MPEG 音訊解碼器最佳化後的在嵌入式 DSP 模擬器上的模擬結果及其解碼效能。
In this thesis, we implement the optimization of MP3 decoder based on embedded DSP core. Then we will be
successful in running the optimized MP3 decoder on embedded DSP platform. Our optimized MP3 decoder could be used to verify the consistency and functionality between embedded DSP simulator and embedded DSP RTL design core. Nowadays the MPGE Audio Decoder (MAD) is a very popular digital audio compression technique, adapting to the small mobile equipments, such as MP3 player and mobile phone. Based on embedded DSP, our optimized MAD will improve the decoding speed to 48% and program code size to 30%. Therefore, we could shorten the time for verifying embedded DSP design core and be helpful to decode in real-time.
The outline of the thesis, we will overview the theory of MP3 decoder. Then we will illustrate the implementation of the MAD optimization. Then we will illustrate the implementation of porting the MAD to the PreSOCes platform and porting the optimized MAD to embedded DSP simulator. Then, we will use the optimized MAD to verify the embedded DSP design core and port the verified Starfish RTL core and the optimized MAD to the FPGA platform (UMVP-2000, Global Unichip). Finally, we will show the simulation results and the performance of the optimized MAD with embedded DSP simulator.
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[2] Yingbiao Yao, Qingdong Yao, Peng LIU, Zhibin Xiao, “Embedded Software Optimization for MP3 Decoder Implemented on RISC Core”, IEEE Transactions on Consumer Electronics, Vol. 50, No. 4, NOVEMBER 2004.
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[5] The website of the MICROTIME COMPUTER INC,
“http://www.microtime.com.tw/English/PreSOC.htm”
[6] The website of the GLOBAL UNICHIP INC,
“http://www.globalunichip.com”
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“http://leto.net/docs/C-optimization.php”.
[9] MPEG Audio Decoder,
“http://www.underbit.com/products/mad/”.
[10] MICROTIME COMPUTER INC, “Linux for Creator-S3C2410 User’s Guide”.
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[12] HSIEH S. HOU, “A Fast Recursive Algorithm For Computing the Discrete Cosine Transform”, 1987 IEEE 0096-3518.
[13] HSIEH S. HOU, “The Fast Hartley Transform Algorithm”, 1987 IEEE 0018-9340.
[14] The Single UNIX ® Specification, Version 2,
“http://www.opengroup.org/onlinepubs/007908799/xsh/string.h.html”.
[15] GLOBAL UNICHIP INC, “UMVP2000 document: ARM Application Development.pdf”.