System in package (SiP) design has become popular by the industry because of its low design complexity, easy heterogeneous integration and short time to market. In the low frequency design, metal connections between different components can be thought as perfect connections which will not affect the performance. Therefore, there is no restriction on IC substrates; every kind of printed circuit board (PCB) can be adopted in the SiP design. However, the requirement for high frequency product has become a trend now. Those connections used in the package should be modeled as transmission lines. The signal integrity issues on transmission lines such as impedance mismatch or EMI effects have to be managed so that the design can be guaranteed functional.
Among the choices of different types of PCB, 4-layer PCB is commonly adopted by the industry. It contains stripline or mirostrip structures, therefore the impedance can be predicted. On the other hand, there will be difficulties to form striplines or microstrips in 2-layer PCB. Without advanced 3D RLC modeling, it is thought to be difficult product designs because the electrical properties are hard to be managed in current EDA for SiP. Less number of layers in PCB is cheaper and thinner than 4-layer PCB.
In this thesis, we used 3 dimensional field solvers to analyze the basic electrical properties of 2-layer IC substrate such as inductance, capacitance and resistance. Then we used SPICE to observe the real behavior of the circuit and compared the difference between 4-layer and 2-layer PCB and found out the impact brought by 2-layer PCB. Furthermore, we found out the advantages of using guard lines. Finally, we gave designers advice on how to adopt 2-layer PCB in their high-speed IC substrate design to improve the cost and the manufacturability.

系統級封裝（System in Package, SiP）因為設計簡單、容易整合以及上市時間快，所以目前大量的被業界所採用。過去，因為系統的頻率較低，所以SiP中用來連接系統內各個元件的金屬線可以被視為完美的聯接線，不會有延遲以及干擾的產生。所以各種的印刷電路板（Printed Circuit Board, PCB）都可以被選擇使用而不會影響整體系統的功能。
但隨著目前產品所需的執行頻率越來越高，我們必須將系統級封裝中的金屬聯接線視為傳輸線(Transmission line)。並且傳輸線所衍生出訊號完整度（signal integrity）的種種問題，例如：阻抗匹配（impedance match）、電磁干擾(Electromagnetic Interference, EMI)等等變成在系統級封裝設計時必須要考慮的重要因素。為了保證設計的正確性，印刷電路板的選擇，變成設計時必須要考量的因素之一。
在高速印刷電路板設計中，四層板因為具有完整的接地層所以可以使用夾心帶線（stripline）或是微帶線（microstrip）的結構做為傳輸線的設計，所以相對的阻抗是可以預期的，因此廣泛的被業界所使用。而缺乏完整參考層的兩層板，因為結構上的限制，所以無法使用夾心帶線或是微帶線的結構來做為傳輸線所使用。因為目前缺乏可用的電子設計自動化（EDA）軟體的關係，所以其電性難以被估計，難以分析阻抗所帶來的影響，故往往被視為不可行的方法。然而在目前的業界，如何縮小產品的體積以及降低成本是非常重要的兩個議題，相形比較之下兩層板在體積以及成本上皆有低於四層板的優勢，不應該被排除在選擇外。
對於兩層板難以估計的電性，本篇論文將會利用三維的電磁模擬軟體，對兩層板進行電感、電容與電阻的分析，進而分析其與四層板的差異，並藉由SPICE模擬最終的波形，進而找出兩層板的問題所在。並探討防護線(guard line)所帶來的好處。希望能提供設計者在使用高速兩層板時的建議，以提昇兩層板設計的可利用性以及降低製成的成本。

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