隨著通訊系統日新月異的發展以及因應 SoCSoC 的整合需求 的整合需求 ，伴隨精準且大量資料傳輸之數位類比轉換器(DACs)已被廣泛地使用，近來又以高速、高線性度電流引導式數位類比轉換器之架構最廣泛使用，因此在電路的趨勢也走向用更小的面積去達到更高速、高動態規格的轉換器。

而為了達到高SFDR的規格要解決諸多非線性的問題，電流源不匹配誤差、電流源有限阻抗、高速暫態切換等…。其中又以電流源不匹配引起的誤差會影響靜態與動態的效能，因此本篇論文提出一種RRHS (Random Rotation-Based Hybrid-Weighted Selector) DEM之邏輯，讓諧波失真引起的誤差能更有效轉換為與輸入數位碼無關的隨機雜訊，也能在更小的面積下達到高精準度之高速數位類比轉換器；在電流源有限阻抗引用Always-on Cascode Stage減少切換阻抗的影響；在暫態切換則採用適度擺幅(Moderate-Swing)去切換開關，有效降低因寄生電容對電流路徑產生的波動。

本論文實現一個十位元具動態性能改良之電流引導式數位類比轉換器，採用TSMC 65 nm、1P9M互補金氧半導體的製程環境，電流源供應電壓為2.5V其餘則為1.2V，雙端差動振福輸出為0.8V，操作在輸入訊號頻寬至少50MHz以及取樣頻率在1GHz下，透過RRHS DEM、Always-on Cascode Stage、Moderate-Swing等技巧，能將SFDR從不到60dB提升到至少70dB以上，也藉此完成一高動態規格之電流引導式數位類比轉換器。

With the rapid development of communication systems and the need for integration of SoCs, the digital-to-analog converters (DACs) with accurate and massive data transmission have been widely used. Recently, high-speed and high-linearity current-steering digital-to-analog converters are widely used architecture. So the trend of the circuit is also going to use a smaller area to achieve a converter with higher speed, high dynamic specification.

In order to achieve high specification of SFDR (SpuriousSpurious -Free ree ree ree Dynamic ynamic ynamic ynamic ynamic ynamic Rangeange ange), many non-linear problems need to be solved, such as the mismatch errors among current sources, finite impedance of current sources, high-speed switching transients, etc… The mismatch errors caused by the current source will affect the performance of both static and dynamic. Therefore, this thesis proposes a mechanism of RRHS (Random Rotation-Based Hybrid-Weighted Selector) DEM so that the errors caused by harmonic distortions can be converted more effectively to random white noise which is independent of the input digital code. It can also achieve high-accuracy and high-speed digital-to-analog converters in a smaller area. The use of the Always-on Cascode Stage to reduce the influence of the switching impedance in the finite impedance of the current sources. For high-speed switching transients, the skill of Moderate-Swing which effectively reduces the fluctuation of the current path due to parasitic capacitances is used to switch the switches.

In this thesis, a 10-bit current-steering digital-to-analog converter with improved dynamic-performance is implemented. The device is fabricated with TSMC 65 nm and 1P9M complementary MOSFETs. Through the RRHS DEM, Always-on Cascode Stage, Moderate-Swing and other techniques, SFDR can be improved from less than 60dB to at least more than 70dB, also completing a high dynamic specifications of the current-steering digital analog-to-digital converter.

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