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研究生: 林均容
Lin, Chun-Jung
論文名稱: N型二硫化鎢電晶體之介電層探討
The Investigation of Dielectric Layer for N-Type WS₂ FET
指導教授: 邱博文
Chiu, Po-Wen
口試委員: 闕郁倫
Chueh, Yu-Lun
李奎毅
Lee, Kuei-Yi
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2024
畢業學年度: 113
語文別: 中文
論文頁數: 98
中文關鍵詞: 二維材料過渡金屬硫屬化物二硫化鎢介電層鈍化層表面處理
外文關鍵詞: 2D materials, TMDCs, WS₂, Dielectric, Passivation, Surface treatment
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  • 本論文研究重點是在探討n型二硫化鎢(WS₂)電晶體的介電層。二硫化鎢是一種過渡金屬硫屬化物(TMDCs),因該材料具有優異的光學和電學性能,尤其是材料表面缺乏懸鍵對載子遷移率的影響,使其成為極具潛力的半導體材料。然而,二硫化鎢在大氣環境易受氧氣和水氣的影響,導致材料氧化或p型摻雜效應,使其電子傳輸特性下降,影響電晶體的性能。因此,本研究的目的是尋找一個穩定的介電層材料來保護通道材料,以提高二硫化鎢電晶體在大氣中的穩定性。

    本研究詳細分析了不同介電材料的特性及成長方式,也探討了不同介電層對元件電性的影響,並成功以電漿輔助原子層沉積之氧化鉿作為介電層,加上熱蒸鍍鋁金屬後高壓氧化之氧化鋁,作為介電層前鈍化層,使n型二硫化鎢電晶體於大氣環境有效開關,且電晶體之電性表現與介電層製程前無明顯差異。該電晶體之開電流約為10⁻⁶A,關電流約為10⁻¹¹A,次臨界擺幅由約為1270mV/dec,臨界電壓約為4V,載子遷移率約為0.9cm²/V·s。


    The focus of this thesis is on investigating the dielectric layer of n-type tungsten disulfide (WS₂) transistors. Tungsten disulfide, a type of transition metal dichalcogenide (TMDC), has excellent optical and electrical properties. One of its key advantages is the absence of dangling bonds on the material’s surface, which improves the carrier mobility of the material, making it a promising semiconductor material. However, WS₂ is susceptible to oxidation or p-type doping effects due to exposure to oxygen and moisture in the atmosphere, which degrades its electronic transport properties and affects transistor performance. Therefore, the goal of this study is to identify a stable dielectric material to protect the channel material and improve the stability of WS₂ transistors in ambient conditions.
    This study analyzes the properties of different dielectric materials and their deposition methods, and it also explores the impact of different dielectric layers on device performance. The study successfully utilized plasma-enhanced atomic layer deposition (PEALD) of hafnium oxide as the dielectric layer, combined with thermally evaporated aluminum followed by high-pressure oxidation to form aluminum oxide, serving as a passivation layer for the dielectric layer. This approach allowed the n-type tungsten disulfide transistors to effectively switch in atmospheric conditions, with its electrical performance showing no significant difference compared to before dielectric layer processing. The device exhibited an on-current of approximately 10⁻⁶A, an off-current of approximately 10⁻¹¹A, a subthreshold swing of about 1270 mV/dec, a threshold voltage of around 4 V, and a carrier mobility of approximately 0.9 cm²/V·s.

    致謝 i 摘要 iii Abstract iv 目 錄 v 第一章 序論 1 1.1 半導體的發展歷史及微縮限制 1 1.2 二維材料的發展與挑戰 5 1.3 論文架構 6 第二章 過度金屬硫屬化物-二硫化鎢 7 2.1 二硫化鎢之晶體結構 7 2.2 二硫化鎢之能帶結構 10 2.3 二硫化鎢之材料製備 13 2.3.1 化學氣相沉積 13 2.3.2 機械剝離 17 2.4 二硫化鎢之材料檢測 19 2.4.1 光學式顯微鏡 19 2.4.2 拉曼散射光譜檢測 21 2.4.3 光致螢光光譜檢測 23 2.4.4 原子力顯微鏡 25 第三章 電晶體製程與電性結果分析 28 3.1 元件製程 28 3.1.1 濕式轉移 30 3.1.2 乾式轉移 32 3.1.3 DLP黃光微影 33 3.1.4 金屬熱蒸鍍 36 3.1.5 舉離 38 3.2 量測系統及量測模式 40 3.2.1 轉移特性曲線 43 3.2.2 輸出特性曲線 47 3.3 元件電性量測結果分析 49 3.3.1 化學氣相沉積單層二硫化鎢 49 3.3.2 機械剝離多層二硫化鎢 50 第四章 介電層製程與理論探討 54 4.1 常見介電層及選擇限制 54 4.2 介電層與TMDCs介面 58 4.3 原子層沉積 61 4.4 介電層前鈍化層 65 4.4.1 熱蒸鍍金屬高壓氧化 65 4.4.2 電子槍蒸鍍金屬氧化物 67 4.4.3 高分子聚合物 69 4.5 介電層表面改質修飾 71 4.5.1 接觸角檢測表面親疏水性 74 4.5.2 摻雜效應與靜電閘控效應 77 第五章 電晶體與介電層電性結果分析 80 5.1 電子槍蒸鍍Al2O3 83 5.2 電子槍蒸鍍Al2O3 /化學氣相沉積Parylene-C 85 5.3 電子槍蒸鍍Al2O3 /原子層熱沉積HfO2 86 5.4 電子槍蒸鍍Al2O3 /深紫外光輔助原子層沉積Si3N4 90 5.5 熱蒸鍍Al氧化成AlOx 91 第六章 結論與未來展望 94 參考文獻 95

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