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研究生: 張宇行
論文名稱: 三五族半導體上之臨場高介電氧化物原子層沉積
In-situ atomic layer deposition of high-k dielectrics on III-V semiconductors
指導教授: 洪銘輝
黃倉秀
口試委員: 洪銘輝
黃倉秀
郭瑞年
劉致為
綦振瀛
皮敦文
學位類別: 博士
Doctor
系所名稱: 工學院 - 材料科學工程學系
Materials Science and Engineering
論文出版年: 2012
畢業學年度: 100
語文別: 英文
論文頁數: 141
中文關鍵詞: 三五族半導體原子層沉積高介電氧化物
外文關鍵詞: III-V semiconductors, atomic layer deposition, high- dielectrics
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  • 本實驗利用自行設計的緩衝腔體實現了臨場連接原子層沉積機台與分子束磊晶系統的組合。利用這個前所未有的組合,我們得以利用原子層沉積機制沉積高介電氧化物於乾淨的三五族半導體磊晶層上。
    透過臨場光電子能譜分析發現在臨場原子層沉積之氧化鋁/砷化鎵界面有AsOx的鍵結存在。經由實驗發現在沉積約0.9nm的氧化鋁之後進行臨場超高真空退火可以有效去除AsOx的鍵結,並明顯改善此界面的電性特性。
    利用變溫電導量測以及準靜態電容電壓量測方式發現臨場沉積原子層沉積氧化鋁及氧化鉿於含20%的砷化銦鎵上可分別得到7×1012以及5×1012 eV-1cm-2的中央能隙界面缺陷密度,而在含53%的砷化銦鎵上則可分別得到4×1012以及2×1012 eV-1cm-2的中央能隙界面缺陷密度。值得注意的是沉積氧化鋁鉿 (4.5nm)/氧化鉿 (0.8nm)於砷化銦鎵上的結構具有至少能夠承受800oC 熱處理的熱穩定性、在±1MV/cm 保持~10-8 A/cm2的低漏電流、以及1.2nm等校氧化物厚度等優越特性;這些優越特性是非臨場製程無法同時達到的。
    另外,在用臨場沉積5nm氧化鋁在含53%的砷化銦鎵上當做閘極氧化物及使用自動對準製程製備的金氧半場效電晶體(閘極長度為1m)也展示了600m/m的汲極電流及350S/m的互導參數;此結果大幅超越了其他利用非臨場沉積氧化鋁在含53%的砷化銦鎵上當做閘極氧化物的金氧半場效電晶體。
    由本實驗的結果得知臨場原子層沉積製程能夠製備同時具有高熱穩定性、低漏電流、低等效氧化物厚度以及低界缺陷密度的原子層沉積高介電氧化物/砷化銦鎵結構。


    Chapter 1 Introduction 1 1.1 Background 1 1.2 Why Use In-situ ALD Approach? 6 1.3 The Preservation of Pristine III-V’s Surfaces prior to In-situ Deposition of ALD High- Oxides 9 1.4 Techniques for the Deposition of InGaAs and High- Oxides 12 1.4.1 Molecular Beam Epitaxy (MBE) 12 1.4.2 Atomic Layer Deposition (ALD) 18 1.5 X-ray Photoelectron Spectroscopy 23 1.6 Metal-Oxide-Semiconductor Capacitor 31 1.6.1 Capacitance-Voltage (CV) Characteristics of MOSCAP 31 1.6.2 Extraction of the Interfacial Density of States (Dit) 36 1.6.2.1 Temperature-dependent Conductance Method 37 1.6.2.2 Quasi-Static Capacitance-Voltage (QSCV) Measurement 40 1.7 Scanning tunneling microscopy (STM) 43 1.8 Organization of the Thesis 46 Chapter 2 Experimental procedure 48 2.1 The Design of In-situ ALD 48 2.2 Procedure for Sample Fabrication 52 2.3 MBE Growth of GaAs-based III-V Semiconductor Epi-layers 53 2.4 In-situ Deposition of ALD-Al2O3, –HfO2 and -HfAlO 55 2.5 In-situ Interfacial Bonding and Morphology Characterization by XPS and RHEED 62 2.6 Fabrication of MOS Capacitors and Characterization of Electrical Properties 63 Chapter 3 In-situ ALD-Al2O3 and -HfAlO/HfO2 on GaAs (001) 64 3.1 Introduction 64 3.2 Embryonic Deposition Stage of in-situ ALD-Al2O3 on GaAs (001) 65 3.3 In-situ ALD-Al2O3 on GaAs (001)-2×4 and GaAs (001)-4×6 67 3.4 Improvement of C-V Behavior of In-situ ALD-Al2O3 on n-GaAs (001) with the Aid of In-situ UHV Annealing 72 3.5 In-situ ALD-HfAlO/HfO2 on GaAs (001)-4×6 76 3.6 Summary 78 Chapter 4 Passivation of In0.2Ga0.8As by In-situ ALD-Al2O3 and -HfO2 80 4.1 Introduction 80 4.2 In-situ ALD-Al2O3 on In0.2Ga0.8As (001)-4×2 81 4.3 In-situ ALD-HfAlO/HfO2 on In0.2Ga0.8As(001)-4×2 83 4.4 Dit of In-situ ALD-Al2O3 and -HfAlO/HfO2 on In0.2Ga0.8As(001)-4×2 86 4.5 Interfacial Chemical Analyses of In-situ ALD-Al2O3 and -HfAlO/HfO2 on In0.2Ga0.8As(001)-4×2 88 4.6 In-situ ALD-Al2O3/In0.2Ga0.8As with UHV Annealing 90 4.7 Summary 91 Chapter 5. Attainment of Low Interfacial Trap Density Absent of a Large Midgap Peak in In0.53Ga0.47As by In-situ ALD-Al2O3 and -HfO2 Passivation 93 5.1 Introduction 93 5.2 In-situ ALD-HfAlO/Al2O3 and /HfO2 on In0.53Ga0.47As(001)-4×2 95 5.3 Dit(E) Distribution of In-situ ALD-HfAlO/Al2O3 and /HfO2 on In0.53Ga0.47As(001)-4×2 98 5.4 Interfacial Chemical Analyses of In-situ ALD-Al2O3 and -HfO2 on In0.53Ga0.47As(001)-4×2 100 5.5 Summary 103 Chapter 6 Comparison of Self-Aligned Inversion-Channel In0.53Ga0.47As MOSFETs Using Ex-situ and In-situ ALD-Al2O3 as Gate Dielectrics 105 6.1 Introduction 105 6.2 Process Flow for ALD-Al2O3/In0.53Ga0.47As n-MOSFETs 106 6.3 Ex-situ vs. In-situ ALD-Al2O3 Self-aligned Inversion-channel In0.53Ga0.47As n-MOSFETs 108 6.4 Summary 113 Chapter 7 Conclusion 114 Chapter 8 References 117 Appendix- Growth mechanism of atomic layer deposited Al2O3 on GaAs(001)-4×6 surface with trimethylaluminum (TMA) and water as precursors 126

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