摘 要

鐵電材料 Pb(Zr0.53,Ti0.47)O3 (PZT) 應用於超大型積體電路記憶體如Ferroelectric random access memories (FRAM) and Dynamic random access memories (DRAM) 已逐漸受重視。PZT的高介電常數、鐵電極化-電場 (P-E Characteristics) 性質及快速轉換特性使它廣泛的被研究。本論文主要探討 PZT 在不同結構下的電流機制及 Memory window 與電流機制在不同 MFIS 結構下的探討。以下簡略說明：
(1)Metal-PZT-metal (MIM) structure
文獻上，電流-電壓特性很少提及與溫度的關係。在不同溫度和電場下的電流機制，更是附之闕如。本論文研究在低溫時的電流機制為 Space-charge-limited current (SCLC)，而在高溫時電流機制為 Schottky emission。從 SCLC 的理論得知 Trap levels 及 Fermi level。如此電流-電壓特性能透過能帶圖作合理的解釋。
(2)MIM structures with different electrodes
文獻上，電流-電壓特性都是根據特定一種 MIM 結構作電流機制的分析。並無比較不同結構的電流機制及其原因的探討。本研究使用不同電極，來比較電流機制。發現使用 Au 及 Pt 上電極時電流機制不同。 PZT 在 Pt/PZT/Pt 的結構在低電壓時的電流機制為Ohmic conduction。而在高電壓時的電流機制為Poole-Frenkel emission。從 Ohmic conduction 的理論得知 Pt/PZT interface 的 Barrier Height，由此可建立 Pt/PZT/Pt 的能帶圖來解釋電流-電壓特性。
(3)Metal-PZT-insulator-Silicon (MFIS) structures with different insulator materials
Insulator 主要是防止鐵電層與 Si substrate 的交互反應。如果使用傳統的 SiO2 gate oxide，則無法承受分壓後的高電場。因此 High-κ 材料應用在 MFIS當 Insulator 是未來的發展趨勢。本研究用三種不同的High-κ 材料如 HfO2、 La2O3、Dy2O3 來當 Insulator。本研究探討三種 MFIS結構之在不同的電壓和溫度下的電流-電壓特性及電流機制。 Memory window 的大小及不同 Insulator 厚度對 Memory window 影響的探討。
(4)Charge Trapping Effect of MFIS structures
文獻上，我們只知道 Memory window 的 Degradation 是由於 Charge injection 的效應。對於 Charge injection 的機制與對 Memory window 的影響程度則無提及。本研究介紹一種模型，即應用 Constant stress 的改變，可由 C-V characteristics 得知 Memory window 的改變是受正 Charge或負 Charge 的影響，進而可以作定量分析。 Charging trapping 可由能帶圖的解釋及輔助。另外由MIM 及MFIS 結構下之不同的Stress transient current 亦可解釋 Charging trapping 效應。
(5)MFIS transistors
文獻上討論甚少，尤其是以lanthanide oxides來當insulator layer更是付之闕如。近年來lanthanide oxides逐漸受到重視，是因為比傳統binary oxides有因其有較好的thermal stability及相當的band offsets。本論文成功製作以lanthanide oxides, Dy2O3來當insulator layer的MFIS transistors.

Abstract

Lead zirconate titanate Pb(Zr0.53,Ti0.47)O3 (PZT) is a promising ferroelectric material for VLSI circuit applications especially in ferroelectric random access memories (FRAM) and DRAM. Its large dielectric constant and rapid switching characteristics can meet the requirements for both storage devices. However, before PZT films can be fully utilized, its electric properties need to be better understood. MFIS structure have emerged as promising non-volatile memory devices. The superior characteristics of MFIS include a single-device structure, low power consumption and non-destructive read-out operation. In this thesis, metal/PZT/metal capacitors, metal/PZT/insulator/silicon capacitors and metal/PZT/insulator/silicon transistors were fabricated.
The temperature dependence of the current conduction mechanisms in Au/PZT/Pt metal-insulator-metal (MIM) thin film capacitors was investigated. The dominant current conduction mechanism from 300K to 375K is space-charge-limited current (SCLC) due to holes and changes to Schottky emission in the temperature range of 400K-500K. The transition voltage (Vtr) of SCLC conduction and the trap-filled-limited voltage (VTFL) were measured. The deep trap level extracted from VTFL is positioned at 0.39 eV above the valance band edge. The Au/PZT barrier height extracted from Schottky emission is 0.85 eV.
The electrical conduction currents through the MIM capacitors depend on the electrode material due to different work functions of the metal electrodes. The conduction current observed in Au/PZT/Pt is lower by about two orders of magnitude compared to that of Pt/PZT/Pt at low field (<0.4 MV/cm) due to the larger barrier height for holes of Au/PZT. The energy band diagrams of the Au/PZT/Pt and Pt/PZT/Pt structures are compared. Hole transport is used to explain the conduction mechanisms in these two capacitor structures.
MFIS capacitors with PZT ferroelectric layer and HfO2, La2O3 and Dy2O3 insulator layers were fabricated. The purpose of the insulator layer is to prevent the reaction and inter-diffusion between the ferroelectric layer and silicon substrate as well to improve the retention properties. The size of the capacitance-voltage (C-V) memory windows was investigated. The temperature dependence of the current conduction mechanisms through the MFIS capacitors was also investigated.
The oxide trapped charges in the ferroelectric/insulator layers are studied by a voltage stress method. The flatband voltage (VFB) is measured before and after the voltage stress. The energy band diagram of the MFIS structure at inversion and accumulation modes are plotted and the VFB shift can be explained by the trapping or de-trapping of charges. The result is consistent with the charge trapping model.
Metal-Ferroelectric-insulator-semiconductor (MFIS) field effect transistors with PZT ferroelectric layer and lanthanide oxide Dy2O3 insulator layer were fabricated. The memory windows measured from C-V curves of MFIS capacitors and IDS-VGS curves of MFIS transistors are consistent. The non-volatile operation of MFIS transistors was demonstrated by applying positive/negative writing pulses. A high driving current of 9 mA/mm was obtained even for long channel devices with a channel length of 20 mm. The electron mobility is 181 cm2/V-s. The retention properties of MFIS transistors was also measured.

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