相變化材料之所以能夠作為記憶體之用，主要是因為它具有特殊的電流電壓特性所致，當此相變化材料為非晶態時，外加一電壓到此材料上，由於相變化材料在電性上表現是近似半導體特性-當溫度越高、導電性越佳。當電壓施加達到一臨界值（Vth），電阻會忽然降低，導致電流增加、電壓降低（Vth - Vh）。而Vth隨著相變化材料組成及結晶狀態的不同會有所不同。

而隨著施加電壓的上升，相變化材料的溫度也逐漸上升，當溫度超過結晶溫度（Tg）時，相變化材料藉由成核、成長方式（Nucleation and Growth）從非晶態轉成結晶態。當施加電壓降下來時，其電流及阻值也下降，在低施加電壓範圍，結晶態與非晶態之阻值還是有相當大的差距。這就是我們用來作為記憶”0”、”1”的區域，當要讀取這範圍的數據時，只要施加極小的電壓即可判別寫入數據的差異。若溫度再繼續上升達到熔點，相變化材料會由結晶態漸漸融化成高阻值之非晶態。

本篇論文以電荷守恆定律以及能量方程式去模擬分析探討在結晶相與非結晶相之間電阻的變化和相變化的區域；下電極的截面積對加熱時間與電流的影響；上電極厚度會對相變化層的冷卻造成多少影響；以及Rs值的大小在set過程中對相變化記憶體加熱時間的影響。

Chalcogenide phase change memory devices use the alloy system, which is non-volatile and the access speed of the chalcogenide device can be as fast as DRAM. Meanwhile, chalcogenide phase change memory also possesses advantages on scalability, low power and high endurance to cycling. A chalcogenide phase change memory is operated by using its high resistance ratio between amorphous phase (reset state) and crystalline phase (set state). Typically the resistance ratio is over 1000 times between the two states. In this article the simulations for the thermal behavior and the electrical properties of the Phase-Change Memory in reset and set states have been conducted using the energy equation and the charge conservation law. However, simulations on the issue related the change of phases on the conductive resistance are not reported.

Therefore, the present work will focus on using the charge conservation law and the energy equation to analyze the resistance variations between the crystalline and amorphous states of the layer based phase-change device, PCRAM (Phase-change Random Access Memory), which is the future-generation non-volatile memory. Issues addressed in the present study also include,
1.the effects of the thickness of the layer on the cooling rate
2.the influences of the cross-section area of the BEC layer on the heating time
3.the effects of the ratio of the current-limiting resistance over the resistance of PCRAM on the set operation.

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