記憶體佔了積體電路功率消耗很大的一部分。在過去的文獻中提到，在微處理器中，記憶體甚至可以佔了整顆晶片40% 的功率消耗。而且大小相等，但是架構不同的記憶體之間，功率消耗行為的差異也非常的大。因此一個準確且有效率的記憶體功率消耗模型，可以幫助積體電路設計工程師在較早的設計時程選擇適當的記憶體架構，進而達到節省整個電路功率消耗的目的。
在這篇論文當中，我們針對記憶體產生器所產生的靜態隨機存取記憶體提出了一個快速的外插式建構功率消耗模型的方法。我們的方法只需要針對少量的小型記憶體做功率的模擬。再經由這些小型記憶體功率消耗的資料，使用外插法推得其它不同架構的記憶體功率消耗。我們提出的方法比建構傳統的內插式功率模型的方法快，因為我們不需要對較大型的記憶體做功率的模擬，在對大型的記憶體做功率模擬的程序是很耗費時間的，也因此我們的方法可以節省建構功率模型的時間。在增進預測功率的準確度方面，我們結合了多工器導向線性近似法的技術，成功地將預測寫入記憶體的功率誤差從26.49% 降至 3.02%，而將預測讀取記憶體的功率誤差從21.49% 降至2.77%。另外，我們也考慮了操作電壓及溫度變化對整個記憶體功率消耗的影響，並且對它們功率消耗的行為建構了適合的數學模型。

In this thesis, we propose an efficient extrapolation-based power modeling method for memory compliers that generate SRAM macros. Our method only needs to simulate a small number of memory configurations with relatively small sizes. The obtained results are then extrapolated to any other configurations. Our method is much faster than the conventional interpolation-based approaches since it avoids the simulation of large-sized memory macros. For enhancing the accuracy, we combine the linear approximation with a MUX-oriented technique that successfully slashes the predicting error from 26.49% to 3.02% for the write operation and 21.49% to 2.77% for the read operation. The effects of the operating voltage and temperature on power consumption are also considered semi-analytically with only 3% approximation error.

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