研究生: |
楊 皓 Yang, Hao |
---|---|
論文名稱: |
雙堆疊電荷捕捉層於奈米薄片通道非揮發記憶體研究 Double Stacked Charge Trapping Layer on Poly-Si Nanosheet Channels Nonvolatile Memory |
指導教授: |
吳永俊
Wu, Yung-Chun |
口試委員: |
張廖貴術
Changliao, Kuei-Shu 巫勇賢 Wu, Yung-Hsien 李耀仁 Lee, Yao-Jen |
學位類別: |
碩士 Master |
系所名稱: |
原子科學院 - 工程與系統科學系 Department of Engineering and System Science |
論文出版年: | 2017 |
畢業學年度: | 105 |
語文別: | 英文 |
論文頁數: | 48 |
中文關鍵詞: | 雙堆疊通道 、堆疊捕捉層 、奈米薄片 、非揮發記憶體 |
外文關鍵詞: | double stack channel, stack trapping layer, nanosheet, Nonvolatile Memory |
相關次數: | 點閱:1 下載:0 |
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在記憶體市場隨著時代的演進以及技術不斷的開發下,其使用比例和花費也不斷的持續擴張。以目前市場上充斥著許許多多不同種的電子產品以及行動裝置看來,講究體積、快速和耗電量小等因素都是消費者選擇購買的主因,而記憶體市場也因此在半導體產業中站得一席之地。本論文主要是在探討3D堆疊式的記憶體技術,藉由雙根通道堆疊的機制以及良好的閘極控制能力,使的兩根的多晶矽通道都有良好的電特性,實驗中也比較奈米薄片和傳統式的平板式鰭式電晶體的電晶體特性和記憶體特性,從成果看來雙層的奈米薄片有較高的開關電流比(Ion/Ioff ratio >106),以漏電流角度看來,小的漏電會有效使記憶體特性和在電路上資料的讀取可以更加有效快速。在記憶體電性量測上,奈米薄片的寫入機制不論是以FN穿隧或是Band-to-Band穿隧上都比穿統的平板式鰭式記憶體來的快速,在P/E speed上的比較,我們發現以FN穿隧更加適合本次實驗的記憶體結構。最後我們量測其可靠度方面,第一部分為: endurance,經過104的抹寫,此結構依然保持不錯的記憶體特性,第二部分為: retention,以將記憶體放置85oC
環境下,作延伸線可以發現,在10年後依舊有55%的記憶體特性,第三部分為: 高溫retention,這個的目的主要是在算出記憶體保持載子的能力,我們稱之活化能Ea,利用Arrhenius 方程式求出Ea值,並可預測出此次研究的記憶體可以在室溫的操作下,保持10年以上的資料。
Following the development of technology and generation passing, the memory market become larger. Its use of the proportion and cost continuous expansion. The market is full of many different kinds of electronic products and mobile devices.
Small size, fast, low leakage are become the basic reason of consumer choose. The memory market will keep a large part of semiconductor industry. This research is study of 3D stack nanosheet channel technology. Double channel have a good electrical characteristic by using channel stacking and good gate control ability. In this research, we also compare transistor and memory characteristic of nanosheets channels with tradition planar device. We can find double stack nanosheet has high on/off ration ( > 106). The advantage of low leakage will make memory and circuit velocity improving. Memory measurement show the nanosheet channels device is more fast the planar NVM by using FN tunneling or BBHE model injection. The P/E speed shows FN tunneling model is suitable for this research device fabrication. The last measurment is reliability. First part is endurance, the memory window still maintain good memory window after 104 cycle P/E operation. Second part is retention, at 85oC environment, we can find the memory window still maintain 55% from extension lines. The last part is high temperature retention, the purpose of the measurement is to predicate the device lift time in the future and calculate the Ea value from Arrhenius equation. This research retention lifetime can over 10 years in room temperature working environment.
Reference
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Chapter 2
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Chapter 4
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