高介電常數氧化物/金屬閘極再加上高電子遷移率三五族半導體，此金氧半疊層技術將為電子工業達成高效能與低功耗應用，成為下世代的新電子元件。此論文主要目的為藉由結合電性、化學性、結構性的各種分析方法，了解及控制這些異質結構疊層的介面鈍化保護效果。
此臨場沉積的方式，不僅利用稀土族氧化物甚至是氧化鉿相關的高介電材料，來做為介面調變工程以成功地達到三五族半導體表面的鈍化保護效果：低於十二次方且在能帶中段沒有峰形分布、低於一個奈米的等效厚度、低的漏電流、半導體與氧化物間的導電與價電能帶差皆大於一點五個電子伏特、優異的熱與化學穩定性(大於800度)。
更進一步成功地發展製作自我對準(self-aligned)閘極先上(gate-first)反轉通道(inversion-channel)增強型砷化銦鎵N型金氧半場效電晶體，有著低次臨界擺幅(<100 mV/dec)；汲極電流為1.5 mA/μm；非本質通道電導值為0.77 mS/μm；電子遷移率峰值為2100 cm2/Vs。
此研究顯示，藉由介面調變工程，可成功地滿足欲實現有著高效能之極微元件的關鍵要求。

The High-κ/Metal-Gate plus III-V high mobility channel materials is regarded as a urgent issue for achieving high performance and low power dissipation complementary metal-oxide-semiconductor (CMOS) technology beyond 15 nm node. A combination of electrical, chemical, and structural characterization methods to evaluate the MOS interface passivation quality. The interface engineering of in-situ directly deposited not only rare-earth oxide (REOs) but also HfO2-based high-κ dielectrics on III-V surface exhibited the successful passivation, in terms of low interfacial density of states (Dit) below 10e12 eV-1cm-2 without midgap peak, low equivalent oxide thickness (EOT) below 1 nm, low leakage current, both conduction band offset (ΔEc) and valence band offset (ΔEv) are larger than 1.5 eV, and truly high thermal stability higher than 800 oC. Moreover, high performance of self-aligned gate first inversion-channel MOS field-effect-transistors (MOSFETs) have achieved steep subthreshold swing (SS) value below 100 mV/dec, a maximum drain current (Id,max) of 1.5 mA/μm, a maximum transconductance (Gm) of 0.77 mS/μm, and a peak field-effect mobility (μFE) of 2100 cm2/Vs. This work suffices the key for realizing ultimately scaled devices with really high performance.

[1] G. E. Moore, Daedelus 125, 55 (1964); G. E. Moore, Cramming more components onto integrated circuit. Electronics 38, 114-116 (1965).
[2] G. Baccarani, M. R. Wordeman, and R. H. Dennard, “Generalized Scaling Theory And Its Application To A 1/4 Micrometer MOSFET Design”, IEEE Trans. Electron Devices 31, 452 (1984).
[3] D. A. Muller, T. Sorsch, S. Moccio, F. H. Baumann, and G. Timp, “The electronic structure at the atomic scale of ultrathin gate oxides”, Nature (London) 399, 758 (1999).
[4] J. B. Neaton, D. A. Muller, and N. W. Ashcroft, “Electronic Properties of the Si/SiO2 Interface from First Principles”, Phys. Rew. Lett. 85, 1298 (2000).
[5] G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-□□gate dielectrics: Current status and materials properties considerations”, J. of Appl. Phys. 89, 5243 (2001).
[6] J. Robertson, “High dielectric constant gate oxides for metal oxide Si transistors”, Rep. Prog. Phys. 69, 327 (2006).
[7] M. V. Fischetti, D. A. Neumayer, and E. A. Cartier, “Effective electron mobility in Si inversion layers in metal–oxide–semiconductor systems with a high-κ insulator: The role of remote phonon scattering”, J. Appl. Phys. 90, 4587 (2001).
[8] J. del Alamo, D. Antoniadis, “IEDM Short Course: Emerging Nanotechnology and Nano-Electronics”, Washington, DC, 9 December 2007.
[9] International Technology Roadmap for Semiconductors (ITRS), 2010 Update. http://www.itrs.net/
[10] M. W. Hong, J. R. Kwo, P. C. Tsai, Y. C. Chang, M. L. Huang, C. P. Chen, and T. D. Lin, “III-V MOSFET’s with High k Dielectrics”, Jpn. J. of Appl. Phys. 46, 3167 (2007).
[11] M. Radosavljevic, B. Chu-Kung, S. Corcoran, G. Dewey, M. K. Hudait, J. M. Fastenau, J. Kavalieros, W. K. Liu, D. Lubyshev, M. Metz, K. Millard, N. Mukherjee, W. Rachmady, U. Shah, and Robert Chau, “Advanced High-□ Gate Dielectric for High-performance Short-Channel In0.7Ga0.3As Quantum Well FET on Si for Low Power Logic Application”, Tech. Dig. - Int. Electron Devices Meet. 319 (2009).
[12] M. Heyns and W. Tsai, “Ultimate Scaling of CMOS Logic Devices with Ge and III-V Materials”, MRS Bull. 34, 485 (2009).
[13] S. M. Sze and Kwok K. Ng, “Physics of Semiconductor Devices”, 3rd edition, John Wiley & Sons, Inc., Hoboken, New Jersey, USA 2007.
[14] J. Robertson and B. Falabretti, “Band offset of high □ oxides on III-V semiconductors”, J. Appl. Phys. 100, 014111 (2006).
[15] K. Navrátil, I. Ohlídal, and F. Lukeš, “The physical structure of the interface between single-crystal GaAs and its oxide film”, Thin Solid Films 56, 163 (1979).
[16] G.P Schwartz, “Analysis of native oxide films and oxide-substrate reactions on III–V semiconductors using thermochemical phase diagrams”, Thin Solid Films 103, 3 (1983).
[17] W. T. Tsang, “Self‐terminating thermal oxidation of AlAs epilayers grown on GaAs by molecular beam epitaxy”, Appl. Phys. Lett. 33, 426 (1978).
[18] E. I. Chen, N. Holonyak, and S. A. Maranowski, “AlxGa1−xAs–GaAs metal–oxide semiconductor field effect transistors formed by lateral water vapor oxidation of AlAs”, Appl. Phys. Lett. 66, 2688 (1995).
[19] A. G. Revesz and K. H. Zainnger, “An Amorphous Modification of Gallium-Arsenic (V) Oxide”, J. Amer. Ceram. Soc. 46, 606 (1963).
[20] O. A. Weinreich, “Oxide Films Grown on GaAs in an Oxygen Plasma”, J. Appl. Phys. 37, 2924 (1966).
[21] S. Ingrey, W. M. Lau, and N. S. McIntyre, “An x‐ray photoelectron spectroscopy study on ozone treated GaAs surfaces”, J. Vac. Sci. Technol. A 4, 984 (1986).
[22] T. Sawada, H. Hasegawa and H. Ohno, “Electronic Properties of a Photochemical Oxide-GaAs Interface”, Jpn. J. Appl. Phys. 26, L1871 (1987).
[23] J. L. Alay, W. Vandervorst, and H. Bender, “Ion‐beam induced oxidation of GaAs and AlGaAs”, J. Appl. Phys. 77, 3010 (1995).
[24] H. Becke, R. Hall, and J. White, “Gallium arsenide MOS transistors”, Solid-State Electron. 8, 813 (1965).
[25] J. L. Freeouf, D. A. Buchanan, S. L. Wright, T. N. Jackson, and B. Robinson, “Accumulation capacitance for GaAs‐SiO2 interfaces with Si interlayers”, Appl. Phys. Lett. 57, 1919 (1990).
[26] A. Callegari, P. D. Hoh, D. A. Buchanan, and D. Lacey, “Unpinned gallium oxide/GaAs interface by hydrogen and nitrogen surface plasma treatment”, Appl. Phys. Lett. 54, 332 (1989).
[27] E. S. Aydil, K. P. Giapis, R. A. Gottscho, V. M. Donnelly, and E. Yoon, “Ammonia plasma passivation of GaAs in downstream microwave and radio‐frequency parallel plate plasma reactors”, J. Vac. Sci. Technol. B 11, 195 (1993).
[28] M. Hong, J. P. Mannaerts, J. E. Bowers, J. Kwo, M. Passlack, W.-Y. Hwang, and L. W. Tu, “Novel Ga2O3(Ga2O3) passivation techniques to produce low Dit oxide-GaAs interfaces”, J. Cryst. Growth 175, 422 (1997).
[29] J. Kwo, D. W. Murphy, M. Hong, R. L. Opila, J. P. Mannaerts, A. M. Sergent, and R. L. Masaitis, “Passivation of GaAs using (Ga2O3)1−x(Gd2O3)x, 0 ⩽ x ⩽ 1.0 films”, Appl. Phys. Lett. 75, 1116 (1999).
[30] M. Hong, J. Kwo, A. R. Kortan, J. P. Mannaerts, and A. M. Sergent, “Epitaxial cubic gadolinium oxide as a dielectric for gallium arsenide passivation”, Science 283, 1897 (1999).
[31] M. L. Huang, Y. C. Chang, C. H. Chang, Y. J. Lee, P. Chang, J. Kwo, T. B. Wu, and M. Hong, “Surface passivation of III-V compound semiconductors using atomic-layer-deposition-grown Al2O3”, Appl. Phys. Lett. 87, 252104 (2005).
[32] M. L. Huang, Y. C. Chang, C. H. Chang, T. D. Lin, J. Kwo, T. B. Wu, and M. Hong, “Energy-band parameters of atomic-layer-deposition Al2O3/InGaAs heterostructure”, Appl. Phys. Lett. 89, 012903 (2006).
[33] H. C. Chiu, L. T. Tung, Y. H. Chang, Y. J. Lee, C. C. Chang, J. Kwo, and M. Hong, “Achieving a low interfacial density of states in atomic layer deposited Al2O3 on In0.53Ga0.47As”, Appl. Phys. Lett. 93, 202903 (2008).
[34] Y. Xuan, Y. Q. Wu, and P. D. Ye, “High-Performance Inversion-Type Enhancement-Mode InGaAs MOSFET With Maximum Drain Current Exceeding 1 A/mm”, IEEE Electron Device Lett. 29, 294 (2008).
[35] H.-C. Lin, W.-E. Wang, G. Brammertz, M. Meuris, and M. Heyns, “Electrical study of sulfur passivated In0.53Ga0.47As MOS capacitor and transistor with ALD Al2O3 as gate insulator”, Microelectron. Eng. 86, 1554 (2009).
[36] H. Zhao, J. Huang, Y.-T. Chen, J. H. Yum, Y. Wang, F. Zhou, F. Xue, and J. C. Lee, “Effects of gate-first and gate-last process on interface quality of In0.53Ga0.47As metal-oxide-semiconductor capacitors using atomic-layer-deposited Al2O3 and HfO2 oxides”, Appl. Phys. Lett. 95, 253501 (2009).
[37] E. J. Kim, L Wang, P. M. Asbeck, K. C. Saraswat, and P. C. McIntyre, “Border traps in Al2O3 In0.53Ga0.47As (100) gate stacks and their passivation by hydrogen anneals”, Appl. Phys. Lett. 96, 012906 (2010).
[38] Y. C. Chang, M. L. Huang, K. Y. Lee, Y. J. Lee, T. D. Lin, M. Hong, J. Kwo, T. S. Lay, C. C. Liao, and K. Y. Cheng, ”Atomic-layer-deposited HfO2 on In0.53Ga0.47As: Passivation and energy-band parameters”, Appl. Phys. Lett 92, 072901 (2008).
[39] K. Y. Lee, Y. J. Lee, P. Chang, M. L. Huang, Y. C. Chang, M. Hong, and J. Kwo, “Achieving 1 nm capacitive effective thickness in atomic layer deposited HfO2 on In0.53Ga0.47As”, Appl. Phys. Lett. 92, 252908 (2008).
[40] N. Goel, D. Heh, S. Koveshnikov, I. Ok, S. Oktyabrsky, V. Tokranov, R. Kambhampati, M. Yakimov, Y. Sun, P. Pianetta, C. K. Gaspe, M. B. Santos, J. Lee, P. Majhi, and W. Tsai, “Addressing The Gate Stack Challenge For High Mobiltiy InxGa1-xAs Channels For NFETs”, Tech. Dig. - Int. Electron Devices Meet. 363 (2008).
[41] Y. Xuan, Y. Q. Wu, T. Shen, T. Yang, and P. D. Ye, “High performance submicron inversion-type E-mode InGaAs MOSFETs with ALD Al2O3, HfO2 and HfAlO as gate dielectrics”, Tech. Dig. - Int. Electron Devices Meet. 637 (2007).
[42] S. Koveshnikov, W. Tsai, I. Ok, J. C. Lee, V. Torkanov, M. Yakimov, and S. Oktyabrsky, “Metal-oxide-semiconductor capacitors on GaAs with high-□ gate oxide and amorphous silicon interface passivation layer”, Appl. Phys. Lett. 88, 022106 (2006).
[43] Injo Ok, Hyoung-sub Kim, Manhong Zhang, Chang-Yong Kang, Se Jong Rhee, Changhwan Choi, Siddarth A. Krishnan, Tackhwi Lee, Feng Zhu, Gaurav Thareja, and Jack C. Lee, “Metal gate-HfO2 MOS structures on GaAs substrate with and without Si interlayer”, IEEE Electron Device Lett. 27, 145 (2006).
[44] H.-S. Kim, I. Ok, M. Zhang, C. Choi, T. Lee, F. Zhu, G. Thareja, L. Yu, and J. C. Lee, “Ultrathin HfO2 (equivalent oxide thickness=1.1 nm) metal-oxide-semiconductor capacitors on n-GaAs substrate with germanium passivation”, Appl. Phys. Lett. 88, 252906 (2006).
[45] Ming Zhu, Chih-Hang Tung, and Yee-Chia Yeo, “Aluminum oxynitride interfacial passivation layer for high-permittivity gate dielectric stack on gallium arsenide”, Appl. Phys. Lett. 89, 202903 (2006).
[46] T. D. Lin, H. C. Chiu, P. Chang, L. T. Tung, C. P. Chen, M. Hong, J. Kwo, W. Tsai, and Y. C. Wang, “High-performance self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistor with Al2O3-Ga2O3(Gd2O3) as gate dielectrics”, Appl. Phys. Lett. 93, 033516 (2008).
[47] C. P. Chen, T. D. Lin, Y. J. Lee, Y. C. Chang, M. Hong, and J. Kwo, “Self-aligned inversion n-channel In0.2Ga0.8As-GaAs metal–oxide–semiconductor field-effect-transistors with TiN gate and Ga2O3(Gd2O3) dielectric”, Solid-State Electron. 52, 1615-1618 (2008).
[48] A. Chen, M. Passlack, N. Medendorp, and D. Braddock, “Current conduction processes in high-□ Gd0.31Ga0.1O0.59/Ga2O3 gate dielectric stacks on GaAs”, Appl. Phys. Lett. 84, 2325 (2004).
[49] M. M. Frank, G. D. Wilk, D. Starodub, T. Gustafsson, E. Garfunkel, Y. J. Chabal, J. Grazul, and D. A. Muller, “HfO2 and Al2O3 gate dielectrics on GaAs grown by atomic layer deposition”, Appl. Phys. Lett. 86, 152904 (2005).
[50] Y. L. Huang, P. Chang, Z. K. Yang, Y. J. Lee, H. Y. Lee, H. J. Liu, J. Kwo, J. P. Mannaerts, and M. Hong, "Thermodynamic stability of Ga2O3(Gd2O3)/GaAs interface", Appl. Phys. Lett. 86, 191905 (2005).
[51] Y. Xuan, H. C. Lin, P. D. Ye, and G. D. Wilk, ”Capacitance-voltage studies on enhancement-mode InGaAs metal-oxide-semiconductor field-effect transistor using atomic-layer-deposited Al2O3 gate dielectric”, Appl. Phys. Lett. 88, 263518 (2006).
[52] S. J. Koester, E. W. Kiewra, Y. Sun, D. A. Neumayer, J. A. Ott, M. Copel, D. K. Sadana , D. J. Webb, J. Fompeyrine, J.-P. Locquet, C. Marchiori, M. Sousa, and R. Germann, “Evidence of electron and hole inversion in GaAs metal-oxide-semiconductor capacitors with HfO2 gate dielectrics and □-Si/SiO2 interlayers”, Appl. Phys. Lett. 89, 042104 (2006).
[53] C.-H. Chang, Y.-K. Chiou, Y.-C. Chang, K.-Y. Lee, T.-D. Lin, T.-B. Wu, M. Hong, and J. Kwo, “Interfacial self-cleaning in atomic layer deposition of HfO2 gate dielectric on In0.15Ga0.85As”, Appl. Phys. Lett. 89, 242911 (2006).
[54] W. P. Li, X. W. Wang, Y. X. Liu, S. I. Shim, and T. P. Ma, “Demonstration of unpinned GaAs surface and surface inversion with gate dielectric made of S3N4”, Appl. Phys. Lett. 90, 193503 (2007).
[55] D. Choi, J. S. Harris, M. Warusawithana, and D. G. Schlom, “Annealing condition optimization and electrical characterization of amorphous LaAlO3/GaAs metal-oxide-semiconductor capacitors”, Appl. Phys. Lett. 90, 243505 (2007).
[56] N. Goel, P. Majhi, W. Tsai, M. Warusawithana, D. G. Schlom, M. B. Santos, J. S. Harris, and Y. Nishi, “High-indium-content InGaAs metal-oxide-semiconductor capacitor with amorphous LaAlO3 gate dielectric”, Appl. Phys. Lett. 91, 093509 (2007).
[57] K. H. Shiu, T. H. Chiang, P. Chang, L. T. Tung, M. Hong, J. Kwo, and W. Tsai, “1 nm equivalent oxide thickness in Ga2O3(Gd2O3)/In0.2Ga0.8As metal-oxide-semiconductor capacitors”, Appl. Phys. Lett. 92, 172904 (2008).
[58] K. H. Shiu, C. H. Chiang, Y. J. Lee, W. C. Lee, P. Chang, L. T. Tung, M. Hong, J. Kwo, and W. Tsai, ”Oxide scalability in Al2O3/Ga2O3(Gd2O3)/In0.2Ga0.8As/GaAs heterostructures”, J. Vac. Sci. Technol. B 26, 1132 (2008).
[59] H.-C. Chin, M. Zhu, G. S. Samudra, and Y.-C. Yeo, “n-Channel GaAs MOSFET with TaN/HfAlO Gate Stack Formed Using In Situ Vacuum Anneal and Silane Passivation”, J. Electrochem. Soc. 155 (7), H464 (2008).
[60] H.-C. Chin, M. Zhu, X. Liu, H.-K. Lee, L. Shi, L.-S. Tan, and Y.-C. Yeo, “Silane-Ammonia Surface Passivation for Gallium Arsenide Surface-Channel n-MOSFETs”, IEEE Electron Device Lett. 30, 110 (2009).
[61] S. Koveshnikov, N. Goel, P. Majhi, H. Wen, M. B. Santos, S. Oktyabrsky, V. Tokranov, R. Kambhampati, R. Moore, F. Zhu, J. Lee, and W. Tsai, “In0.53Ga0.47As based metal oxide semiconductor capacitors with atomic layer deposition ZrO2 gate oxide demonstrating low gate leakage current and equivalent oxide thickness less than 1 nm”, Appl. Phys. Lett. 92, 222904 (2008).
[62] C.-W. Cheng and E. A. Fitzgerald, “In situ metal-organic chemical vapor deposition atomic-layer deposition of aluminum oxide on GaAs using trimethyaluminum and isopropanol precursors”, Appl. Phys. Lett. 93, 031902 (2008).
[63] Y. Hwang, M. A. Wistey, J. Cagnon, R. Engel-Herbert, and S. Stemmer, “Metal-oxide-semiconductor capacitors with erbium oxide dielectrics on In0.53Ga0.47As Channels”, Appl. Phys. Lett. 94, 122907 (2009).
[64] H.-C. Lin, W.-E. Wang, G. Brammertz, M. Meuris, and M. Heyns, “Electrical study of sulfur passivated In0.53Ga0.47As MOS capacitor and transistor with ALD Al2O3 as gate insulator”, Microelectron. Eng. 86, 1554 (2009).
[65] R. Engel-Herbert, Y. Hwang, J. Cagnon, and S. Stemmer, “Metal-oxide-semiconductor capacitors with ZrO2 dielectrics grown on In0.53Ga0.47As by chemical beam deposition”, Appl. Phys. Lett. 95, 062908 (2009).
[66] B. Shin, J. R. Weber, R. D. Long, P. K. Hurley, C. G. Van de Walle, and P. C. McIntyre, “Origin and passivation of fixed charge in atomic layer deposited aluminum oxide gate insulators on chemically treated InGaAs substrates”, Appl. Phys. Lett. 96, 152908 (2010).
[67] M. Hong, Z. H. Lu, J. Kwo, A. R. Kortan, J. P. Mannaerts, J. J. Krajewski, K. C. Hsieh, L. J. Chou, and K. Y. Cheng, “Initial growth of Ga2O3(Gd2O3) on GaAs: Key to the attainment of a low interfacial density of states”, Appl. Phys. Lett. 76, 312 (2000).
[68] L. Lin and J. Robertson,”Defect states at III-V semiconductor oxide interfaces”, Appl. Phys. Lett. 98, 082903 (2010).
[69] I. Barin, “Thermochemical data of pure substances”, Weinheim, New York, 1995, ISBN: 3527287450.
[70] F. Ren, M. Hong, W. S. Hobson, J. M. Kuo, J. R. Lothian, J. P. Mannaerts, J. Kwo, S. N. G. Chu, Y. K. Chen, and A. Y. Cho, “Demonstration of enhancement-mode p- and n-channel GaAs MOSFETS with Ga2O3(Gd2O3) As gate oxide”, Solid-State Electron. 41, 1751 (1997).
[71] F. Ren, J. M. Kuo, M. Hong, W. S. Hobson, J. R. Lothian, J. Lin, H. S. Tsai, J. P. Mannaerts, J. Kwo, S. N. G. Chu, Y. K. Chen, and A. Y. Cho, “Ga2O3(Gd2O3)/InGaAs enhancement-mode n-channel MOSFETs”, IEEE Electron Device Lett. 19, 309 (1998).
[72] M. Hong, J. N. Baillargeon, J. Kwo, J. P. Mannaerts, and A. Y. Cho, 2001 IEEE International Symp. on Compound Semiconductors 345. Conf. Proc. IEEE 27th International Symposium on Compound Semiconductors, Monterey, CA, Oct 02-05, 2000.
[73] Y. Xuan, Y. Q, Wu, H. C. Lin, T. Shen, and P. D. Ye, “Submicrometer Inversion-Type Enhancement-Mode InGaAs MOSFET With Atomic-Layer-Deposited Al2O3 as Gate Dielectric”, IEEE Electron Device Lett. 28, 935 (2007).
[74] J. P. de Souza, E. Kiewra, Y. Sun, A. Callegari, D. K. Sadana, G. Shahidi, D. J. Webb, J. Fompeyrine, R. Germann, C. Rossel, and C. Marchiori, “Inversion mode n-channel GaAs field effect transistor with high-□/metal gate”, Appl. Phys. Lett. 92, 153508 (2008).
[75] H.-S. Kim, I. Ok, M. Zhang, F. Zhu, S. Park, J. Yum, H. Zhao, J. C. Lee, J. Oh, and P. Majhi, “Inversion-type enhancement-mode HfO2-based GaAs metal-oxide-semiconductor field effect transistors with a thin Ge layer”, Appl. Phys. Lett. 92, 032907 (2008).
[76] I. Ok, H. Kim, M. Zhang, F. Zhu, S. Park, J. Yum, H. Zhao, D. Garcia, P. Majhi, and J. C. Lee, “Influence of the substrate orientation on the electrical of GaAs capacitors and self-aligned transistors using HfO2 and silicon interfacial passivation layer”, Appl. Phys. Lett. 92, 202908 (2008).
[77] I. Ok, H. Kim, M. Zhang, F. Zhu, S. Park, J. Yum, H. Zhao, D. Garcia, P. Majhi, N. Goel, W. Tsai, C. K. Gaspe, M. B. Santos, and J. C. Lee, “Self-aligned n-channel MOSFET on high-indium-content In0.53Ga0.47As and InP using physical vapor deposition HfO2 and silicon interfacial passivation layer”, Appl. Phys. Lett. 92, 202903 (2008).
[78] H.-C. Chin, M. Zhu, Z.-C. Lee, X. Liu, K.-M. Tan, H. K. Lee, L. Shi, L.-J. Tang, C.-H. Tung, G.-Q. Lo, L.-S. Tan, and Y.-C. Yeo, “A New Silane-Ammonia Surface Passivation Technology for Realizing Inversion-Type Surface-Channel GaAs N-MOSFET with 160 nm Gate Length and High-Quality Metal-Gate/High-□ Dielectric Stack”, Tech. Dig. - Int. Electron Devices Meet. 383 (2008).
[79] H.-C. Chin, X. Liu, X. Gong, and Y.-C. Yeo, “Silane and Ammonia Surface Passivation Technology for High-Mobility In0.53Ga0.47As MOSFETs”, IEEE Trans. Electron Devices 57, 973 (2010).
[80] H. C. Chiu, P. Chang, M. L. Huang, T. D. Lin, Y. H. Chang, J. C. Huang, S. Z. Chen, J. Kwo, W. Tsai, and M. Hong, “High performance self-aligned inversion-channel MOSFETs with In0.53Ga0.47As channel and ALD-Al2O3 gate dielectric”, 67th Device Res. Conf. Dig. 83 (2009).
[81] T. D. Lin, H. C. Chiu, P. Chang, Y. H. Chang, Y. D. Wu, M. Hong, and J. Kwo, “Self-aligned inversion-channel In0.75Ga0.25As metal–oxide–semiconductor field-effect-transistors using UHV-Al2O3/Ga2O3(Gd2O3) and ALD-Al2O3 as gate dielectrics”, Solid-State Electron. 54, 919 (2010).
[82] T. D. Lin, P. Chang, Y. D. Wu, H. C. Chiu, J. Kwo, and M. Hong, “Achieving very high drain current of 1.23 mA/μm in a 1μm-gate-length self- aligned inversion-channel MBE-Al2O3/Ga2O3(Gd2O3)/In0.75Ga0.25As MOSFET”, J. Crystal Growth 323, 518 (2011).
[83] H. C. Chin, X. Gong, X. Liu, and Y.-C. Yeo, “Lattice-Mismatched In0.4Ga0.6As Source-Drain Stressors With In Situ Doping for Strained In0.53Ga0.47As Channel n-MOSFETs”, IEEE Electron Device Lett. 30, 805 (2009).
[84] Y. C. Wang, M. Hong, J. M. Kuo, J. P. Mannaerts, J. Kwo, H. S. Tsai, J. J. Krajewski, J. S. Weiner, Y. K. Chen, and A. Y. Cho, “Advances in GaAs MOSFET's using Ga2O3(Gd2O3) as gate oxide”, Mat. Res. Soc. Symp. Proc. 219 (1999).
[85] Y. Xuan, Y. Q. Wu, and P. D. Ye, “High-performance inversion-type enhancement-mode InGaAs MOSFET with maximum drain current exceeding 1 A/mm”, IEEE Electron Device Lett. 29, 294 (2008).
[86] Y. Xuan, T. Shen, M. Xu, Y. Q. Wu, and P. D. Ye, “High-performance Surface Channel In-rich In0.75Ga0.25As MOSFETs with ALD High-□ as Gate Dielectric”, Tech. Dig. - Int. Electron Devices Meet. 371 (2008).
[87] Y. Q. Wu, W. K. Wang, O. Koybasi, D. N. Zakharov, E. A. Stach, S. Nakahara, J. C. M. Hwang, and P. D. Ye, “0.8-V Supply Voltage Deep-Submicrometer Inversion-Mode In0.75Ga0.25As MOSFET”, IEEE Electron Device Lett. 30, 700 (2009).
[88] R. J. W. Hill, D. A. J. Moran, X. Li, H. Zhou, D. Macintyre, S. Thoms, A. Asenov, P. Zurcher, K. Rajagopalan, J. Abrokwah, R. Droopad, M. Passlack, and I. G. Thayne, “Enhancement-Mode GaAs MOSFETs With an In0.3Ga0.7As Channel, a Mobility of Over 5000 cm2/ V•s, and Transconductance of Over 475 □s/□m”, IEEE Electron Device Lett. 28, 1080 (2007).
[89] Y. Sun, E. W. Kiewra, S. J. Koester, N. Ruiz, A. Callegari, K. E. Fogel, D. K. Sadana, J. Fompeyrine, D. J. Webb, J.-P. Locquet, M. Sousa, R. Germann, K. T. Shiu, and S. R. Forrest, “Enhancement-Mode Buried-Channel In0.7Ga0.3As/In0.52Al0.48As MOSFETs With High-□ Gate Dielectrics”, IEEE Electron Device Lett. 28, 473 (2007).
[90] Y. Sun, E. W. Kiewra, J. P. de Souza, J. J. Bucchignano, K. E. Fogel, D. K. Sadana, and G. G. Shahidi, “Scaling of In0.7GA0.3As Buried-Channel MOSFETs”, Tech. Dig. - Int. Electron Devices Meet. 367 (2008).
[91] P. Chang, W. C. Lee, T. D. Lin, J. Kwo, C.-H. Hsu, M. Hong, “MBE - enabling technology beyond Si CMOS”, J. Crystal Growth 323, 511 (2011).
[92] Alfred Cho, “Molecular beam epitaxy”, AIP Press, New York, ISBN: 1563961326.
[93] E. H. C. Parker, “The technology and physics of molecular beam epitaxy”, Springer London, England, ISBN: 0306418606.
[94] Michel Houssa, “High-□ Gate Dielectrics (Materials Science and Engineering)”, Taylor & Francis, Inc., Dec. 2003, ISBN: 0750309067.
[95] S. M. George, A. W. Ott, and J. W. Klaus, “Surface Chemistry for Atomic Layer Growth”, J. Phys. Chem. 100, 13121 (1996).
[96] Rikka L. Puurunen, “Surface chemistry of atomic layer deposition: A case study for the trimethylaluminum/water process”, J. Appl. Phys. 97, 121301 (2005).
[97] K. Mistry, C. Allen, C. Auth, B. Beattie, D. Bergstrom, M. Bost, M. Brazier, M. Buehler, A. Cappellani, R. Chau, C.-H. Choi, G. Ding, K. Fischer, T. Ghani, R. Grover, W. Han, D. Hanken, M. Hattendorf, J. He, J. Hicks, R. Huessner, D. Ingerly, P. Jain, R. James, L. Jong, S. Joshi, C. Kenyon, K. Kuhn, K. Lee, H. Liu, J. Maiz, B. McIntyre, P. Moon, J. Neirynck, S. Pae, C. Parker, D. Parsons, C. Prasad, L. Pipes, M. Prince, P. Ranade, T. Reynolds, J. Sandford, L. Shifren, J. Sebastian, J. Seiple, D. Simon, S. Sivakumar, P. Smith, C. Thomas, T. T roeger, P. Vandervoorn, S. Williams, and K. Zawadzki, “A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging”, Tech. Dig. - Int. Electron Devices Meet. 247 (2007).
See also at http://www.intel.com/technology/45nm/index.htm
[98] A. Y. Cho, “Morphology of Epitaxial Growth of GaAs by a Molecular Beam Method: The Observation of Surface Structures”, J. Appl. Phys. 41, 2780 (1970).
[99] G. Laurence, F. Simondet, and P. Saget, “Combined RHEED-AES Study of The Thermal-treatment of (001) GaAs Surface Prior To MBE Growth”, Appl. Phys. 19, 63 (1979).
[100] J. H. Neave and B. A. Joyce, “Temperature-range for Growth of Auto-epitaxial GaAs Films by MBE”, J. Cryst. Growth 43, 204 (1978).
[101] A. Y. Cho and I. Hayashi, “Surface Structures and Photoluminescence of Molecular Beam Epitaxial Films of GaAs”, Solid State Electron. 14, 125 (1971).
[102] L. L. Chang, Proc. 2nd Int. Symp. Molecular Beam Epitaxy and Related Clean Surface Techniques, Tokyo, 1982, p. 57.
[103] C. A. Chang, R. Ludeke, L. L. Chang, and L. Esaki, “Molecular-Beam Epitaxy (MBE) of In1-XGaXAs and GaSb1-YAsY”, Appl. Phys. Lett. 31, 759 (1977).
[104] Stefan Hüfner, “Photoelectron Spectroscopy: Principles and Applications”, Springer-Verlag, Berlin Heidelberg, 1995, ISBN: 0387191089.
[105] B. K. Agarwal, “X-Ray Spectroscopy, 2nd edition”, Springer-Verlag, Berlin Heidelberg, June 1991, ISBN: 0387507191.
[106] David B. Williams and C. Barry Carter, “Transmission electron microscopy: a textbook for materials science”, Plenum Press, New York, 1996, ISBN: 030645324X.
[107] B. Fultz and J. M. Howe, “Transmission electron microscopy and diffractometry of materials, 2nd edition”, Springer, New York, 2002, ISBN: 3540738851.
[108] D. K. Schroeder, “Semiconductor Material and Device Characterization, 2nd edition”, New York: Wiley, 1998, ISBN: 0471241393.
[109] G. Groeseneken, H. E. Maes, N. Beltran, and R. F. D. Keeersmaecker, “A reliable approach to charge-pumping measurements in MOS transistors”, IEEE Trans. Electron Devices 31, 42 (1984).
[110] P. Masson, J.L. Autran, and J. Brini, “On the tunneling component of charge pumping current in ultrathin gate oxide MOSFET’s”, IEEE Electron Device Letter 20, 92 (1999).
[111] L. M. Terman, “An investigation of surface states at a silicon/silicon dioxide interface employing metal-oxide-silicon diodes”, Solid State Electron. 5, 285-299 (1962).
[112] E. H. Nicollian and A. Goetzberger, “The Si-SiO2 interface—Electrical properties as determined by the MIS conductance technique”, Bell sys. Tech. J. 46, 1055-1133, (1967).
[113] J. Kwo, M. Hong, A. R. Kortan, K. T. Queeney, Y. J. Chabal, J. P. Mannaerts, T. Boone, J. J. Krajewski, A. M. Sergent, and J. M. Rosamilia, “High □ gate dielectrics Gd2O3 and Y2O3 for Silicon”, Appl. Phys. Lett. 77, 130 (2000).
[114] J. Kwo, M. Hong, A. R. Kortan, K. T. Queeney, Y. J. Chabal, R. L. Opila, Jr., D. A. Muller, S. N. G. Chu, B. J. Sapjeta, T. S. Lay, J. P. Mannaerts, T. Boone, H. W. Krautter, J. J. Krajewski, A. M. Sergent, and J. M. Rosamilia, “Properties of high □ gate dielectrics Gd2O3 and Y2O3 for Si”, J. Appl. Phys. 89, 3920 (2001).
[115] S. Kamiyama, E. Kurosawa, S. Abe, M. Kitajima, T. Aminaka, T. Aoyama, K. Ikeda, and Y. Ohji, “Vth Fluctuation Suppression and High Performance of HfSiON/Metal Gate Stacks by Controlling Capping-Y2O3 Layers for 22nm Bulk Devices”, Tech. Dig. - Int. Electron Devices Meet. 431 (2009).
[116] M. Hong, A. R. Kortan, P. Chang, Y. L. Huang, C. P. Chen, H. Y. Chou, H. Y. Lee, J. R. Kwo, M. W. Chu, C. H. Chen, L. V. Goncharova, E. Garfunkel, and T. Gustafsson, “High-quality nanothickness single-crystal Sc2O3 film grown on Si(111)”, Appl. Phys. Lett. 87, 251902 (2005).
[117] C. W. Nieh, Y. J. Lee, W. C. Lee, Z. K. Yang, A. R. Kortan, M. Hong, J. Kwo, and C.-H. Hsu, “Nanometer thick single crystal Y2O3 films epitaxially grown on Si (111) with structure approaching perfection”, Appl. Phys. Lett. 92, 061914 (2008).
[118] T. D. Lin, M. C. Hang, C. H. Hsu, J. Kwo, and M. Hong, “MBE grown high-quality Gd2O3/Si(111) hetero-structure”, J. Crystal Growth 301-302, 386 (2007).
[119] Y. Kuroda, H. Hamono, T. Mori, Y. Yoshikawa, and M. Nagao, “Specific Absorpsion Behavior of Water on a Y2O3 Surface”, Langmuir 16, 6937 (2000).
[120] C.-H. Hsu, P. Chang, W. C. Lee, Z. K. Yang, Y. J. Lee, M. Hong, J. Kwo, C. M. Huang, and H. Y. Lee, ”Structure of HfO2 films epitaxially grown on GaAs(001)”, Appl. Phys. Lett. 89, 122907 (2006).
[121] S. C. Liou, M.-W. Chu, C. H. Chen, Y. J. Lee, P. Chang, W. C. Lee, M. Hong, and J. Kwo, ”Transmission electron microscopy characterization of HfO2/GaAs(001) heterostructures grown by molecular beam epitaxy”, Appl. Phys. A: Mater. Sci. Process. 91, 585-589 (2008).
[122] M.-H. Cho, Y. S. Roh, C. N. Whang, K. Jeong, S. W. Nahm, D.-H. Ko, J. H. Lee, N. I. Lee, and K. Fujihara, ”Thermal stability and structural characteristics of HfO2 films on Si (100) grown by atomic-layer deposition”, Appl. Phys. Lett. 81, 472 (2002).
[123] Y. Yacoby, M. Sowwan, E. Stern, J. O. Cross, D. Brewe, R. Pindak, J. Pitney, E. M. Dufresne, and R. Clarke, ”Direct determination of epitaxial interface structure in Gd2O3 passivation of GaAs”, Nat. Mate. 1, 99-101 (2002).
[124] D. Briggs and M. P. Seah (Eds), “Practical Surface Analysis, Vol. 1, Auger and X-ray Photoelectron Spectroscopy”, 2nd edition, John Wiley & Sons, Chichester, UK 1992, Ch. 3 , pp. 134-135 & Ch. 4, pp. 207-210, ISBN: 0471953407.
[125] Y. J. Lee, C. H. Lee, L. T. Tung, T. H. Chiang, T. Y. Lai, J. Kwo, C.-H. Hsu, and M. Hong, ”Al2O3/Ga2O3(Gd2O3) passivation on In0.2Ga0.8As/GaAs—structural intactness with high-temperature annealing”, J. Phys. D: Appl. Phys. 43, 135101(2010).
[126] M. Akazawa and H. Hasegawa, “Admittance study of GaAs high-□ metal-insulator-semiconductor capacitors with Si interface control layer”, J. Vac. Sci. Technol. B 26, 1569-1578 (2008).
[127] J. Hauser, CVC © 1996 NCSU software, Department Electrical Computer Engineering, North Carolina State University, Raleigh, NC.
[128] M. L. Huang, Y. C. Chang, Y. H. Chang, T. D. Lin, J. Kwo, and M. Hong, “Energy-band parameters of atomic layer deposited A2O3 and HfO2 on InxGa1-xAs”, Appl. Phys. Lett. 94, 052106 (2009).
[129] M. Zhu, H.-C. Chin, C.-H. Tung, and Y.-C. Yeo, ”In Situ Silane Passivation of Gallium Arsenide and Deposition of High-Permittivity Gate Dielectric for MOS”, J. Electrochem. Soc. 154, H879 (2007).
[130] R. Suri, D. J. Lichtenwalner, and V. Misra, ”Impact of elemental arsenic on electrical characteristics of MOS capacitors on GaAs using atomic-layer-deposited HfO2 gate dielectric”, Appl. Phys. Lett. 92, 243506 (2008).
[131] H.-S. Kim, I. Ok, M. Zhang, F. Zhu, S. Park, J. Yum, H. Zhao, and J. C. Lee, “Gate oxide scaling down in HfO2–GaAs metal-oxide-semiconductor capacitor using germanium interfacial passivation layer”, Appl. Phys. Lett. 91, 042904 (2007).
[132] H.-S. Kim, I. Ok, M. Zhang, T. Lee, F. Zhu, L. Yu, and J. C. Lee, ”Metal gate-HfO2 metal-oxide-semiconductor capacitors on n-GaAs substrate with silicon/germanium interfacial passivation layers”, Appl. Phys. Lett. 89, 222903 (2006).
[133] D. Lin, G. Brammertz, S. Sioncke, C. Fleischmann, A. Delabie, K. Martens, H. Bender, T. Conard, W. H. Tseng, J. C. Lin, W. E. Wang, K. Temst, A. Vatomme, J. Mitard, M. Caymax, M. Meuris, M. Heyns, and T. Hoffmann, “Enabling the high-performance InGaAs/Ge CMOS: a common gate stack solution”, Tech. Dig. - Int. Electron Devices Meet. 327 (2009).
[134] É. O’Connor, S. Monaghan, R. D. Long, A. O’Mahony, I. M. Povey, K. Cherkaoui, M. E. Pemble, G. Brammertz, M. Heyns, S. B. Newcomb, V. V. Afanas’ev, and P. K. Hurley, “Temperature and frequency dependent electrical characterization of HfO2/InxGa1−xAs interfaces using capacitance-voltage and conductance methods”, Appl. Phys. Lett. 92, 102902 (2009).
[135] Y. Hwang. R. Engel-Herbert, N. G. Rudawski, and S. Stemmer, “Analysis of trap state densities at HfO2/In0.53Ga0.47As interfaces”, Appl. Phys. Lett. 96, 102910 (2010).
[136] P. Chang, W. C. Lee, M. L. Huang, Y. J. Lee, M. Hong, and J. Kwo, “Passivation of InGaAs using in situ molecular beam epitaxy Al2O3/HfO2 and HfAlO/HfO2”, J. Vac. Sci. Technol. B 28(3) C3A9 (2010).
[137] K. Y. Lee, W. C. Lee, Y. J. Lee, M. L. Huang, C. H. Chang, T. B. Wu, M. Hong, and J. Kwo, “Molecular beam epitaxy grown template for subsequent atomic layer deposition of high □ dielectrics”, Appl. Phys. Lett. 89, 222906 (2006).
[138] J. B. Clemens, S. R. Bishop, J. S. Lee, A. C. Kummel, and R. Droopad, “Initiation of a passivated interface between hafnium oxide and In(Ga)As(001)-(4×2)”, J. Chem. Phys. 132, 244701 (2010).
[139] S. R. Bishop, J. B. Clemens, E. A. Chagarov, J. Shen, and A. C. Kummel, “Theoretical analysis of initial adsorption of high-□ metal oxides on InxGa1-xAs(001)-(4×2) surfaces”, J. Chem. Phys. 133, 194702 (2010).
[140] E. H. Nicollian and J. R. Brews, “MOS (Metal Oxide Semiconductor) Physics and Technology”, John Wiley & Sons, New York, USA 1982, Ch. 4, pp. 139, ISBN: 0471085006.
[141] R. K. Ahrenkiel, R. Ellingson, S. Johnston, and M. Wanlass, “Recombination lifetime of In0.53Ga0.47As as a function of doping density”, Appl. Phys. Lett. 72, 3470 (1998).
[142] Y. Hwang, V. Chobpattana, J. Y. Zhang, J. M. LeBeau, R. Engel-Herbert, and S. Stemmer, “Al-doped HfO2/In0.53Ga0.47As metal-oxide-semiconductor capacitors”, Appl. Phys. Lett 98, 142901 (2011).
[143] É. O’Connor, B. Brennan, V. Djara, K. Cherkaoui, S. Monaghan, S. B. Newcomb, R. Contreras, M. Milojevic, G. Hughes, M. E. Pemble, R. M. Wallace, and P. K. Hurley, “A systematic study of (NH4)2S passivation (22%, 10%, 5%, or 1%) on the interface properties of the Al2O3/In0.53Ga0.47As/InP system for n-type and p-type In0.53Ga0.47As epitaxial layers”, J. Appl. Phys. 109, 024101 (2011).
[144] K. Martens, C. O. Chui, G. Brammertz, B. D. Jaeger, D. Kuzum, M. Meuris, M. M. Heyns, T. Krishnamohan, K. Saraswat, H. E. Maes, and G. Groseneken, “On the Correct Extraction of Interface Trap Density of MOS Devices With High-Mobility Semiconductor Substrates”, IEEE Trans. Electron Devices 55, 547 (2008).
[145] G. Brammertz, K. Martens, S. Sioncke, A. Delabie, M. Caymax, M. Meuris, and M. Heyns, “Characteristics trapping lifetime and capacitance-voltage measurements of GaAs metal-oxide-semiconductor structures”, Appl. Phys. Lett. 91, 133510 (2007).
[146] http://www.ioffe.ru/SVA/NSM/
[147] Y. Q. Wu, M. Xu, R. S. Wang, O. Koybasi, and P. D. Ye, “High Performance Deep-Submicron Inversion-Mode InGaAs MOSFETs with maximum Gm exceeding 1.1 mS/□m: New HBr Pretreatment and Channel Engineering”, Tech. Dig. - Int. Electron Devices Meet. 323 (2009).
[148] J. Huang, N. Goel, H. Zhao, C. Y. Kang, K. S. Min, G. Bersuker, S. Oktyabrsky, C. K. Gaspe, M. B. Santos, P. Majhi, P. D. Kirsch, H.-H. Tseng, J. C. Lee, and R. Jammy, “InGaAs MOSFET Performance and Reliability Improvement by Simultaneous Reduction of Oxide and Interface Charge in ALD (La)AlOx/ZrO2 Gate Stack”, Tech. Dig. - Int. Electron Devices Meet. 335 (2009).
[149] H. Ishii, N. Miyata, Y. Urabe, T. Itatani, T. Yasuda, H. Yamada, N. Fukuhara, M. Hata, M. Deura, M. Sugiyama, M. Takenaka, and S. Takagi, “High Electron Mobility Metal-Insulator-Semiconductor Field-Effect Transistors Fabricated on (111)-Oriented InGaAs Channels”, Appl. Phys. Express 2, 121101 (2009).
[150] J. Lin, S. Lee, H.-J. Oh, W. Yang, G. Q. Lo, D. L. Kwong, and D. Z. Chi, “Plasma PH3-Passivated High Mobility Inversion InGaAs MOSFET Fabricated with Self-Aligned Gate-First Process and HfO2/TaN Gate Stack”, Tech. Dig. - Int. Electron Devices Meet. 401 (2008).
[151] H. J. Oh, J. Q. Lin, S. A. B. Suleiman, G. Q. Lo, D. L. Kwong, D. Z. Chi, and S. J. Lee, “Thermally Robust Phosphorous Nitride Interface Passivation for InGaAs Self-Aligned Gate-First n-MOSFET Integrated with High-□ Dielectric”, Tech. Dig. - Int. Electron Devices Meet. 339 (2009).
[152] Y.-T. Chen, H. Zhao, Y. Wang, F. Xue, F. Zhou, and J. C. Lee, “Fluorinated HfO2 gate dielectric engineering on In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors”, Appl. Phys. Lett. 96, 103506 (2010).
[153] Y.-T. Chen, H. Zhao. J. H. Yum, Y. Wang, F. Xue, F. Zhou, and J. C. Lee, “Improved electrical characteristics of TaN/Al2O3/In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors by fluorine incorporation”, Appl. Phys. Lett. 95, 013501 (2009).