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研究生: 蔡正威
論文名稱: 新型邏輯相容P通道接點耦合閘極可多次寫入非揮發性記憶體
A New P-Channel Multi-Time Programmable Cell with Contact Coupling Gate in Pure CMOS Logic Process
指導教授: 金雅琴
林崇榮
口試委員: 蔡銘進
金雅琴
林崇榮
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2012
畢業學年度: 100
語文別: 中文
論文頁數: 68
中文關鍵詞: NVM
相關次數: 點閱:1下載:0
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  • 摘要
    內嵌式記憶體現今已被廣泛的運用至各種系統晶片中,並作為行動裝置晶片內不可或缺的主要部份,為了能夠整合成系統單晶片,不需額外製程與光罩,完全相容於CMOS邏輯製程的可多次寫入非揮發性記憶體逐漸受到重視。本論文提出一新型邏輯相容接點耦合可多次寫入記憶體,此新型元件藉由接點耦合作為控制閘極提高對浮動閘極耦合率,達到高注入效率低功耗操作。
    此新型邏輯相容接點耦合可多次寫入非揮發性記憶體採用通道熱電洞引發熱電子注入作為寫入操作,並利用選擇閘極與位元線控制;或是採用汲極Fowler-Nordheim穿隧效應,利用位元線與字元線控制;與FN穿隧區域抹除操作,以上操作皆達到多次性寫入抹除。元件的CHHIHE寫入時間200μs、FN寫入時間200ms、抹除時間200ms內完成,元件耐久度超過10k以上,125℃高溫條件下1000小時資料保存性依然良好。結構發展出全新的接點耦合架構有效提高對浮動閘極的控制能力並縮小元件面積。本文所提出此新型元件擁有良好的操作能力、長時間資料可靠度、並可依需求選取高速度或是低功率操作。


    內文目錄 頁 摘要 i Abstract ii 致謝 iii 內文目錄 iv 附圖目錄 vi 表格目錄 viii 第一章 緒論 1 1.1 複晶矽閘極非揮發性記憶體簡介 1 1.2 論文大綱 2 第二章 邏輯相容非揮發性記憶體之回顧 3 2.1 載子注入機制回顧 3 2.1.1 通道熱載子轟擊引發熱載子注入機制(CHHIHE or CHEIHE) 3 2.1.2 Fowler-Nordheim(FN) 穿隧效應 3 2.1.3 帶對帶穿隧效應(Band to Band Tunneling) 4 2.2 單一複晶矽閘極非揮發性記憶體 4 2.2.1 SIPPOS 4 2.2.2 Neobit 5 2.2.3 Y-flash 5 2.3 小結 6 第三章 新型P通道非揮發性記憶體結構與操作機制 13 3.1 元件結構與製作流程 13 3.1.1 元件結構與接點耦合特性 13 3.1.2 製程流程 14 3.2 元件操作機制 15 3.2.1 讀取機制與原理 15 3.2.2 寫入機制與原理 15 3.2.3 抹除機制與原理 16 3.3 小結 17 第四章 新型P通道接點耦合非揮發性記憶體特性分析 24 4.1 元件基本特性分析 24 4.1.2 讀取特性分析 25 4.1.3 寫入特性分析 25 4.1.3.1 以CHH注入機制寫入特性分析 25 4.1.3.2 以通道FN穿隧注入機制寫入特性分析 26 4.1.3.3 以汲極FN穿隧注入機制寫入特性分析 26 4.1.4 抹除特性分析 27 4.2 元件可靠度分析 27 4.2.1 讀取干擾分析 27 4.2.2 寫入干擾分析 28 4.2.2.1 CHH寫入干擾分析 28 4.2.2.2 汲極FN寫入干擾分析 29 4.2.3 元件耐久度分析 29 4.2.4 資料保存性分析 30 4.3 小結 30 第五章 新型P通道接點耦合非揮發性記憶體操作模式最佳化 50 5.1 讀取條件探討與分析 50 5.2 不同寫入機制的元件寫入電流探討 51 5.3 分離電壓FN穿隧抹除 51 5.4 小結 52 第六章 總結 63 6.1 新元件與其它邏輯非揮發性記憶體優點分析 63 6.2 結語與未來展望 63 參考文獻 65

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