本研究之目的在於將高動態範圍之像素陣列、二次相關取樣電路、類比數位轉換器以及週邊電路整合在一個晶片裡，使其能方便應用於現今的可攜式多功能消費電子產品。
傳統的單斜率類比數位轉換器架構以高線性度、架構簡單且低功率損耗的為其優點，相當適用於行並列的影像感測器輸出。因此本研究使用改良後的”二階段式”架構，相較於傳統單斜式架構擁有更快的轉換速度，可應用於未來更高畫素的電子產品中。電路設計的規格為十位元解析度，取樣頻率33kHz。
本研究使用標準的TSMC 0.18μm CMOS標準製程，實際下線晶片為64x36陣列，嘗試實踐一個具有高動態偵測範圍、30frame/s的畫面更新率的單晶片攝影系統。

The purpose of this work is to integrate photovoltage-sensing pixels, correlated double sampling circuit, analog-to-digital converter (ADC) and peripheral circuits in a single chip. Make it easily to be applied to multi-function consumer electronics.
Single-slope ADCs (SS ADC) are suitable for column-parallel CMOS image sensor readout architectures owing to their simplicity, high linearity and low power consumption. This work proposes a column-parallel two-step single-slope ADC (TSSS ADC) for high speed CMOS image sensor. The conversion speed of the proposed ADC is faster than conventional SS ADC. Therefore, TSSS ADCs can handle higher resolution consumer electronics. Designed resolution is 10bit, and the sampling rate is 33kHz.
A 64×36 image sensing pixel array was fabricated with TSMC 0.18 μm CMOS technology, based on the specifications of a Full HD camera-on-ship system with high dynamic range and 30 frames per second.

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