研究生: |
吳宜璋 Yi-Chang Wu |
---|---|
論文名稱: |
1.2伏特低電壓FSK接收器 A 1.2V Low Voltage FSK Receiver |
指導教授: |
黃柏鈞
Po-Chiun Huang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2005 |
畢業學年度: | 93 |
語文別: | 中文 |
論文頁數: | 105 |
中文關鍵詞: | 濾波器 、限制放大器 、低電壓 、信號強度指示 、低中頻 |
外文關鍵詞: | FSK, Filter, Limiter, RSSI, LowIF, Low Voltage |
相關次數: | 點閱:1 下載:0 |
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在這一篇論文中,實現在一個操作在1.2伏特的FSK接收器。這個接收器包含了射頻前端的電路(低雜訊放大器以及I/Q二路的混頻器)、複數域的頻道選擇濾波器、限制放大器和FSK解調器。為了想要減少整個接收器的功率消耗以適合應用於無線通訊中,操作電壓從0.18um正常的1.8伏特降底至1.2伏特。對於基頻的電路來說,需要採用不同的電路架構來適合用在低電壓下。
這個接收器主要是參考了藍芽的通訊規範,藍芽是用GFSK當做它的基頻調變。整個接收器是採用了低中頻的接收器架構,可以使用較少的電路區塊來減少整體的功率消耗以及儘量的減少整個晶片的面積。透過分析藍芽系統所提供的測試考量,可以得到整個接收器的電路表現要求,根據這些要求,便可以進一步的設計整個接收器的電路。
在這個接收器中,射頻前端的低雜訊放大器和混頻器採用的是傳統的電路,因為從系統分析上來看,應用於藍芽系統的接收器前端所需要的電路表現並不是非常的嚴苛。複數域頻率選擇濾波器是採用以6階Butterworth濾波器為基礎的轉導電容濾波器,它具有頻道選擇和排斥鏡像訊號的功用。為了避免製程的漂移,採用了一個以鎖相迴路的自動調整電路來調整整個濾波器的頻率響應。在濾波器之後的則是一個限制放大器,提供信號足夠的放大倍率並且將類比的信號轉換成數位信號來讓之後的電路做處理。這個限制放大器還提供了信號強度指示的功能,能讓基頻信號處理器了解所接收的信號強度。在基頻的FSK解調器方面是用延遲鎖定迴路為架構的FSK解調器,尤於大部分的電路都是偏數位的電路,比較適合操作在較低的電壓下,另外,數位電路並不消耗直流電流,可以進一步的將功率的消耗減低。整個接收器就是由以上的電路區塊所構成,具有低電壓和小面積的優勢。
In this thesis, a FSK receiver operating at 1.2V supply voltage is designed. The receiver contains
RF front-end (consisting of LNA and I/Q path mixers), complex channel selection lter, limiter,
RSSI (received signal strength indicator), and FSK demodulator. To reduce power consumption,
supply voltage is decreased from 1.8V to 1.2V. Some circuit techniques are used to operate under
low supply voltage.
Reference to Bluetooth R
wireless system [1] which uses GFSK as its baseband modulation,
the receiver uses Low-IF architecture to minimize the number of interconnecting blocks and total
circuit area at the same time. Total requirement of the receiver is analyzed according to the test
condition provided by the specication. The design goal is just the requirement.
In the receiver, LNA and Mixer which comprise the RF front-end use conventional architecture due to the requirement is not very rigid. The channel selection lter is a 6th order Butterworth complex lter which provides the function of channel selection and image rejection. Besides, to alleviate the effect of process variation, a PLL-based auto-tuning technique is used. Behind thelter is a limiter which amplies the receiving signal and changes it to full swing digital signal. The limiter can also indicate the signal strength. This function is known as RSSI (Received Signal Strength Indication). At the stage of demodulation, a DLL-type FSK demodulation whose circuits are almost digital-like is used. Because most of the circuits are digital-like, it can operate under low voltage and consumes no DC current. Thus, power consumption is quite small. Circuit blocks mentioned above construct our receiver which has the characteristics of low power and small area.
Last Revised: June, 2005
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