為了儲存日常生活中的各種訊號，懸浮閘元件經常被製作為非揮發性記憶體，例如EPROM、Flash Memory等，由於懸浮閘元件相容於標準CMOS邏輯製程，因此有許多研究將其應用於System on Chip上，但是隨著製程微縮精進，懸浮閘電晶體在製作上遇到許多改變，藉由改進製程上遇到的變化造成的影響，將懸浮閘元件實現在先進製程中。
本論文提出一個使用TSMC 0.18μm CMOS 1P6M的單層多晶矽製程，製作出懸浮閘電晶體元件，藉著研究其在不同偏壓下的各種操作特性，將其元件特性實際應用在電路操作上；此懸浮閘電晶體元件，由兩個PMOS電晶體與一個MOS Varactor組成，使用離子化熱電子注入做為寫入機制，FN穿隧做為抹除機制，藉由量測在不同偏壓條件下的行為，比較懸浮閘電晶體的寫入與抹除特性，同時定出元件操作時的偏壓，最後提出元件耐久度與資料保久度的量測與推算。
接著根據元件特性，利用適當的電路量測懸浮閘電壓的變化，研究出影響懸浮閘電壓寫入準確度的原因，並且設計出一個解決方式，經過實際量測驗證後，能夠改善懸浮閘電壓寫入準確度，使得寫入結果更為準確，同時對各種的操作情況做討論，也探討了實際應用時可能會遇上的不理想情況。
最後討論此懸浮閘電晶體可能的改進方向，以及提出的解決方式的優缺點，針對未來可能遇上的問題討論。

In order to save various kinds of signals, floating gate device is widely used as nonvolatile memories, such as EPROM, Flash memory and so on. Because floating gate device is compatible with strandard CMOS process, there are many researches about applying floating gate device to system on chip. But as process moves into deep-submicron process, there will be many difficulties to achieve floating gate device.
This study proposes a floating gate device with its characteristics which is manufactured by TSMC 0.18μm CMOS 1P6M single poly process. Proposed floating gate device is constructed with two P-channel MOSFETs and a MOS varactor. This device is programmed by impact ionization hot electron injection, and erased by FN tunneling. We tested this device with many different combinations of biases, then compared the result of programming, erasing, device endurance, and data retention characteristics is given in this study.
With those device characteristics, by using a basic circuit which can measure the voltage of floating gate, the reasons that influence on the programming accuracy are proposed in this study. Then a solution is proposed to increase the programming accuracy, which is verified by measurement results.
Finally, possible improvements of this floating gate device are discussed.

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