本論文的研究主題是一個具有能帶隙參考電壓源的低壓降線性穩壓器。由於現今攜帶式電子產品的廣泛應用，使用低壓降線性穩壓器於電源管理晶片中是一項不可或缺的技術，才能在電源的續航力有顯著的提升，並且在消耗功率上有明顯的下降。本論文著重的關鍵是在溫度變化因子對於晶片效能的影響，以能帶隙參考電壓源輸出一不受溫度變化影響的參考電壓，與低壓降線性穩壓器的配合，期望在大變動的溫度範圍下，最後的輸出電壓也能讓晶片順利運作。
在本論文中，首先介紹研究背景與研究目的，也就是低壓降線性穩壓器在現今電子產品中的重要性，與改善溫度因素對其影響的研究動機。接著是低壓降線性穩壓器的基本介紹，包括各項參數簡介與其設計考量。再來是能帶隙參考電壓源的基本介紹，以電路架構的方向入手來解釋如何輸出不受溫度影響的參考電壓，再放上本論文所使用的能帶隙參考電壓源電路，以及其模擬數據結果。最後是低壓降線性穩壓器與能帶隙參考電壓源的結合，在模擬結果上著重在溫度變化對各項參數的影響。

The research topic of this paper is A Low-Dropout Linear Regulator with A Bandgap Reference Voltage Source. Due to the widespread use of portable electronic products today, the use of low-dropout linear regulators in power management chips is an indispensable technology in order to significantly improve the endurance of the power supply and significantly reduce the power consumption. The key point of this paper is that the temperature factor affects the chip performance. The bandgap reference voltage is used to output a reference voltage that is not affected by temperature changes. In cooperation with the low-dropout linear regulator, it is expected that in the case of large temperature range, the output voltage can also make the chip operate appropriately.
In this paper, we first introduce the research background and research purpose, that is, the importance of low-dropout linear regulators in today's electronic products, and the research motivation for improving the influence of temperature factors. Next is a basic introduction to low-dropout linear regulators, including a brief introduction of each parameter and its design considerations. Next is a basic introduction to the bandgap reference voltage source, starting with the direction of the circuit architecture to explain how to output a reference voltage that is not affected by temperature, and then putting on the bandgap reference voltage source circuit used in this paper and its simulation data results. Finally, the combination of a low-dropout linear regulator and an energy bandgap reference voltage source focuses on the effects of temperature changes on various parameters in the simulation results.

[1] D. S. Ma, W. H. Ki and C. Y. Tsui, ”An Integrated One-Cycle Control Buck
Converter with Adaptive Output and Dual Loops for Output Error Correction,”
IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 140-149, Jan. 2004.

[2] G. A. Rincon-Mora and P. E. Allen, “A Low-Voltage, Low Quiescent Current,
Low Drop-Out Regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 36-43,
Jan. 1998.

[3] National Semiconductor, ”Power ”High-Performance Analog Seminar 2007.

[4] Cheung Fai Lee, Philip K. T. “A monolithic current mode CMOS DC-DC converter with on--chip current-sensing technique,” IEEE J. Solid-State Circuits. vol. 39, pp.3-13, Jan. 2004.

[5] Ming-Hsin Huang, Ke-Horng Chen, and Wei-Hsin Wei “Single-inductor dual-output DC-DC converters with high light-load efficiency and minimized cross-regulation for portable devices,’’ in Proc. IEEE Symp. VLSI Circuits (VLSIC), pp.132-133, June 2008.

[6] Chi Yat Leung, Philip K.T. Mok, “A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS technologies,” IEEE J. Solid-State Circuits, vol. 40, no. 11, pp.2265-2274, Nov. 2005.

[7] Hong-Wei Huang, Hsin-Hsin Ho, Chieh-Ching Chien, Ke-Horng Chen, Gin-Kou Ma, and Sy-Yen Kuo, “Dithering skip modulator with a width controller for ultra-wide-load high-efficiency DC-DC converters,” in Proc. IEEE Custom Integrated Circuits Conf. (CICC),pp.643-646,Sep.2006.

[8] Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh, and Ke-Horng Chen, “Current mode DC-DC buck converters with optimal fast-transient control,” in Proc. IEEE Int. Symp. Circuits Syst., May. 2008.

[9] G. A. Rincon-Mora and P. E. Allen, “Optimized Frequency-Shaping Circuit
Topologies for LDO’s,” IEEE Transactions on Circuits and System-II, vol. 45,
pp.703-708, June 1998.

[10] C. K. Chava, and J. Silva-Martinez, “A frequency compensation scheme for LDO voltage regulators,” IEEE Transaction on Circuits and Systems I, vol. 51, pp.1041-1050, June. 2004.

[11] G. W. den Besten and B. Nauta, “Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC’s in 3.3 V technology,” IEEE J. Solid-State Circuits, vol. 33, no. 7, pp. 956-962, July 1998.

[12] G. A. Rincon-Mora, “Active Capacitor Multiplier in Miller-Compensated Circuits” IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 26-32, Jan. 2000.

[13] G. A. Rincon-Mora, “Current Efficient, Low Voltage, Low-Dropout Regulators,”
Ph.D. Thesis, Atlanta, GA: Georgia Institute of Technology, 1996.

[14] B. S. Lee, “Understanding the Terms and Definitions of LDO Voltage Regulators,” Texas Instruments Application Report, SLVA079, Oct. 1999.

[15] B. S. Lee, “Technical review of low dropout voltage regulator operation and
performance,” Texas Instruments Application Report, SLVA072, Aug. 1999.

[16] R. J. Milliken, “A Capacitor-less Low Drop-out Voltage Regulator with Fast Transient Response,” M.S. Thesis, Texas A&M University, 2005.

[17] B. S. Lee, “Technical review of low dropout voltage regulator operation and performance,” Texas Instruments Application Report, SLVA072, Aug. 1999.

[18] P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design. New York, NY: Oxford, 2002.

[19] Y.-S. Shyu, “Low Operating Current Analog Integrated Circuits,” Ph.D Dissertation, National Chiao Tung University, Taiwan, 2002.

[20] B. Razavi, Design of Analog CMOS Integrated Circuit, New York: McGraw-Hill, 2001.

[21] Banba, H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi and K.
Sakui, “A CMOS Bandgap Reference Circuit with Sub-1-V Operation,” IEEE J.
Solid-State Circuits, vol. 34, pp. 670-674, May 1999.
[22] M. Al-Shyoukh, H. Lee, and R. Perez, “A transient-enhanced low-quiescent Current low-dropout regulator with buffer impedance attenuation,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1732–1742, Aug. 2007.

[23] Y. H. Lam, W. H. Ki, and C. Y. Tsui, “Adaptively-biased capacitor-less CMOS low dropout regulator with direct current feedback,” in Proc. IEEE Asia South Pacific Conf. Des. Autom. , Jan. 2006, pp. 104–105.

[24] H. Lee, P. K. T. Mok, and K. N. Leung, “Design of low-power analog drivers based on slew-rate enhancement circuits for CMOS low-dropout regulators,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 9, pp. 563–567, Sep. 2005.

[25] Chen-Chang Zhan, Wing-Hung Ki, “Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator for System-on-Chips,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 57, no. 5, pp. 1017–1028, May. 2010.