研究生: |
張崇原 Chung-Yuan Chang |
---|---|
論文名稱: |
金屬(鋁)/鐵電薄膜(鋯鈦酸鉛)/絕緣層(氧化鏑)/半導體 電容與場效電晶體之製作及電性分析 The fabrication and electrical properties of metal(Al)/ferroelectric (Pb(Zr0.6Ti0.4)O3 )/insulator(Dy2O3)/semiconductor Capacitors and field-effect transistors |
指導教授: |
李雅明
Joseph Ya-Min Lee |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2005 |
畢業學年度: | 93 |
語文別: | 中文 |
論文頁數: | 86 |
中文關鍵詞: | 鐵電薄膜 |
相關次數: | 點閱:2 下載:0 |
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在本次的實驗中我們成功的製作出了金屬(Al)/鐵電薄膜(PZT)/絕緣體(Dy2O3)/半導體(p-type)結構的電容器及電晶體,並對其電性作一些基本量測分析。在電晶體電性的量測方面,我們所得到的臨界電壓為0.7 V,次臨界斜率可達到95mV/decade以及電子遷移率為58 cm2/V-sec,已顯現出本電晶體的一些基本特性。本次所製作出的電晶體得到的次臨界斜率值還算小,表示著電晶體有很明顯的開關能力,但是在電子遷移率過低的問題方面,我們需要再做更進一步的分析探討及改進以讓電晶體的特性更加完好。
在電晶體的記憶體效應方面,由IDS-VGS特性曲線的量測結果分析,我們可發現IDS-VGS曲線走向在掃瞄振幅電壓小於8 V時記憶窗有隨著掃瞄振幅變大而增加的趨勢且為逆時針走向,這表示在當外加電壓小於8V時,IDS-VGS曲線走向是由鐵電極化效應在主導;當外加電壓大於8 V時,電荷注入的影響大於鐵電極化,因此IDS-VGS曲線走向是由電荷注入在主導。同時,在鐵電極化的主導下,記憶窗於掃瞄電壓振幅8 V時最大,為0.79 V。另外,我們量測電容器記憶窗也得到相近之結果,符合公式 □Vwindow=2dfEc。我們也經由IDS-VDS的量測得到MFIS結構電晶體的寫入邏輯“1”和邏輯“0”所得的Ion及Ioff相差為20倍,另外關於記憶保持力部份也得到不錯的結果。
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