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研究生: 李宇晨
Lee, Yu-Chen.
論文名稱: 探索使用自組裝單分子層在矽上進行無催化劑之無電鍍金屬
Exploring seedless electroless deposition of metals on Silicon using self-assembled monolayers (SAMs)
指導教授: 龔佩雲
Keng, Pei-Yuin
口試委員: 林姿瑩
Lin, Tzu-Zing
洪崧富
Hung, Sung-Fu
學位類別: 碩士
Master
系所名稱: 工學院 - 材料科學工程學系
Materials Science and Engineering
論文出版年: 2024
畢業學年度: 112
語文別: 英文
論文頁數: 76
中文關鍵詞: 選擇性沉積自組裝單分子層無電鍍沉積內連線
外文關鍵詞: area selective deposition, self assembled monolayer, electroless deposition, interconnect, ruthenium
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  • 隨著後段製程(BEOL)中金屬內連線結構的尺寸縮小,使得內連線結構的縱橫比變得更高。這導致傳統使用電鍍來沈積內連線之金屬的方法遇到了挑戰,例如物理氣相沉積(PVD)種子層的懸垂或種子層佔據空間,導致後續電鍍的空間不足。近年來,由於無電鍍(ELD)成本低、工藝簡單且能夠在導電和非導電基板上選擇性沉積,因此無電鍍成為一種有前途的方法。然而,鈀催化劑通常用於促進沉積過程,這可能會在互連結構中留下殘留物。因此,本論文研究了非催化劑無電鍍釕的方法。在本研究中,我們在金基板上使用強還原劑和弱還原劑在60 ºC下進行2小時的釕無電鍍(ELD)。然後,我們將成功的無催化層無電鍍釕方法應用於矽基板上,並引入區域選擇性沉積。結果顯示,在較低溫度(45 ºC)和較長時間(4小時)下,釕薄膜在矽基板上的覆蓋率有所提高。對於區域選擇性沉積,我們研究了無電鍍釕和銅在具有化學惰性且常被用作阻擋層甲基末端基的自組裝單分子層(SAMs),以及具有苄亞胺端基的SAMs上的效果。這些苄亞胺末端基除了能作為阻擋層外,也可以減少界面散射,充當擴散屏障。經無電鍍釕和銅後,自組裝單分子層修飾的矽基板上沉積的薄膜平均厚度低於裸露的矽基板,這表明由於自組裝單分子層的疏水性,形成了成核延遲。


    With the downscaling of metal interconnect structures in the back-end-of-line (BEOL) process, the aspect ratio of these structures becomes higher. This leads to challenges for conventional electroplating metallization processes, such as the overhang of physical vapor deposition (PVD) seed layers or the seed layers occupying space, resulting in insufficient room for subsequent electroplating. Recently, electroless deposition (ELD) has emerged as a promising method due to its low cost, simplicity, and ability to selectively deposit on both conductive and non-conductive substrates. However, Pd catalysts are often used to promote the deposition process, which may leave residues in the interconnect structure. Therefore, this thesis developed AS-ELD of Cu and Ru without the seed layer. In this research, we explore the ELD of Ru on gold substrates using both strong and weak reducing agents at 60 ºC for 2 hours. We then apply the successful seedless ELD Ru method to Si/SiO2 substrates and introduce area-selective deposition. Our results show that lower temperatures (45 ºC) and increased time (4 hr) improve the coverage of the as-deposited Ru film on Si/SiO2 substrates. For the area-selective deposition, we investigate the effects of ELD Ru and Cu on SAMs with -CH3 terminals, which are chemically inert and commonly used as blocking layers, as well as SAMs with benzylimine terminals. These benzylimine SAMs can reduce interface scattering, act as a diffusion barrier, and also serve as blocking layers. After ELD Ru and Cu, the lower average thickness of the as-deposited film on SAMs-modified Si/SiO2 substrates compared to bare Si/SiO2 substrates, indicating a nucleation delay due to the hydrophobic nature of the SAMs.

    Chapter 1 Introduction 1 Chapter 2 Literature Review 6 2.1 The continued downscaling of the interconnect 6 2.1.1 Increasing resistivity described by the FS and MS model 6 2.1.2 Alternative material for interconnects 7 2.2 Metallization through electroless deposition in the back-end-of-line (BEOL) 9 2.2.1 Challenge of electroplating 9 2.2.2 Mechanism of electroless deposition of Cu 13 2.2.3 Mechanism of electroless deposition of Ru 16 2.3 Area-selective deposition (ASD) 18 2.4 Self-assembled monolayers (SAM) 24 2.4.1 Introduction of self-assembled monolayers (SAM) 24 2.4.2 Interaction between SAMs and ELD reactants 26 Chapter 3 Preparation and Design of Experiments 30 3.1 Materials and Instrumentation 30 3.2 Synthesis of benzyliminetriethoxysilane (BITES) 31 3.3 Functionalization of BITES and OTS on Si/SiO2 substrate 32 3.4 Preparation of an electroless deposition (ELD)solution 33 3.4.1 Preparation of an electroless deposition (ELD) Cu solution 33 3.4.2 Preparation of an electroless deposition (ELD) Ru solution 34 Chapter 4 Results and Discussion 36 4.1 Synthesis of BITES 36 4.2 Characterization of BITES and OTS (n-Octyltriethoxysilane) 37 4.3 Selectivity of ELD Cu between bare Si/SiO2 substrate and SAMs-modified substrate 42 4.4 ELD of Ru film on the Au substrate without a catalyst 47 4.5 The formation of Ru film on the Si/SiO2 substrate without a catalyst 50 4.6 Selectivity of ELD Ru between bare Si/SiO2 and SAMs-modified Si/SiO2 substrate 55 4.7 The comparison of different processes of ELD Cu and Ru 60 Chapter 5 Conclusion 65 Chapter 6 Prospective 68 Chapter 7 Reference 69

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