簡易檢索 / 詳目顯示

研究生: 葉承泓
Cheng-Hong Yeh
論文名稱: 新清洗液在互補式金氧半電晶體製程之應用
New Cleaning Solution for Complete CMOS Process
指導教授: 趙天生 博士
Dr. Tien-Sheng Chao
口試委員:
學位類別: 碩士
Master
系所名稱: 原子科學院 - 工程與系統科學系
Department of Engineering and System Science
論文出版年: 2001
畢業學年度: 89
語文別: 中文
論文頁數: 52
中文關鍵詞: one-step cleaning
外文關鍵詞:
相關次數: 點閱:3下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 在本論文中,我們提出了一種新的清洗液及方法。和傳統(RCA)清洗方式不同的是,這種新清洗液省略了SC-2的步驟,因此稱為一步驟(One-step)清洗。這新清洗液將發展用來取代傳統的兩個步驟(SC-1和SC-2)的清洗方法。我們在傳統SC-1的清洗液中,加入界面活性劑TMAH及熬合物EDTA來增強清洗之效率。從實驗結果顯示,新清洗液對於矽晶片表面上微粒與金屬的去除清洗,呈現了極大的能力。而表面吸收與雙層的模型,可以解釋TMAH的表面行為。藉著這個模型,我們可以瞭解微粒移除及表面粗造度的原因。然而,從電性的觀點看來,經新清洗液製作出的金氧半電晶體,電性比傳統RCA清洗而製作出的金氧半電晶體好。除此之外,混合了NH4OH, TMAH, EDTA及H2O2之新清洗液,並在溫度六十度五分鐘的清洗方法,無論在微粒去除、金屬污染、電性的行為,皆有非常好的成效及表現。因此,基於省時、降低成本及良好電性表現的優點看來,這新清洗對於未來超大尺寸的晶片清洗,具有非常大的潛力。


    In this thesis, we proposed a new advanced wet-chemical one-step cleaning process, which omits HPM step in RCA. A novel one-step cleaning solution had been developed for standard and pre-gate oxide cleaning to replace the conventional RCA two-sep cleaning recipe, which includes APM (or SC-1) and HPM (or SC-2) step. Tetra Methyl Ammonium Hydroxide (TMAH) and Ethylene Diamine Tetra Acetic acid (EDTA) were added into the RCA SC-1 cleaning solution to enhance cleaning efficiency. From the experimental results, the particle and metallic contaminations on the bare-Si wafer surface could be removed significantly by applying this novel one-step cleaning solution. The surface adsorption and double layer model could explain the surface behavior of TMAH solutions. Based on the model, the improvement on the particle, surface roughness and the metallic contaminants on the surface can be realized. It was observed that the electrical properties of MOSFET after cleaning with this novel solution were better than the conventional RCA cleaning. Besides, the cleaning method combining NH4OH, TMAH, EDTA and H2O2, at 60 °C for 5-min, shows the high performance on particle removal, metal cleaning, surface smoothness and electrical behavior. Hence, this novel one-step cleaning process is very promising for future large-size silicon wafer cleaning due to the advantages of time saving, cost down, and high performance.

    Abstract (in Chinese) i Abstract (in English) ii Acknowledgments (in Chinese) iv Contents v Figure Captions vii Table Captions x Chapter 1 Introduction 1 1.1 The Importance of Wafer Cleanliness and RCA Clean 1.2 Modifications of Conventional RCA Clean 1.3 The Concept of One-step Clean Method Chapter 2 Experimental Process 9 2.1 Cleaning Solution and MOSFET Fabrication Process 2.2 Instrumental Analysis and Electrical Characterization Chapter 3 Results and Discussion 13 3.1 The Physical and Chemical Properties of Novel One-step Cleaning 3.2 Electrical Properties for One-step and RCA Cleaning 3.3 Reliability Issues Chapter 4 Conclusion 46 References 48

    [1] C. Hu, D. Park, A. Yamaichi and S. Yamaichi, "Impact of time dependent dielectric breakdown and stress induced leakage current on the reliability of (Ba,Sr) TiO/sub3/thin film capacitors for Gbit-scale DRAMS," Technical Dig. in IEDM Tech. Dig., p. 261-264, 1997.
    [2] The National Technology Roadmap for semiconductor, p.74,
    Semiconductor Industry Association, San Jose, CA, 1997.
    [3] I. Chen, S. E. Holland, and C. Hu, IEEE Trans. Electron Devices, 32,p. 413, 1985.
    [4] T. Ohmi, "Advanced Wet Chemical Cleaning for Future ULSI Fabrication," Electrochem. Soc., 184th Meeting, New Orleans, p.495, 1993.
    [5] C. Y. Chang and S. M. Sze, ULSI Technology, p. 61, McGraw-Hill,1996.
    [6] H. Akiya, S. Kuwano, and T. Matsumoyo, J. Electrochem. Soc., 141,p.139, 1994.
    [7] W. Kern and D. A. Puotinen, "Cleaning Solutions Based on Hydrogen Peroxide for Use in Silicon Semiconductor Technology," RCA Rev., p.187, 1970.
    [8] M. M. Heyns, S. Verhaverbeke, M. Meuris, P. W. Mertens, H. Schmidt, M. Kubota, A. Philipos-ian, K. Dillenbeck, D. Graft, A.Schnegg, and R. De Blank, "New Wet Cleaning Strategies for Obtaining Highly Reliable Thin Oxides," Mat. Res. Soc. Symp. Proc., p. 315, 1993.
    [9] The National Technology Roadmap for semiconductor, p.153,
    Semiconductor Industry Association, San Jose, CA, 1997.
    [10] H. Morinaga, M. Aoki, T. Maeda, M. Fujisue, H. Tanaka, and M.Toyoda, Mat. Res. Soc. Symp. Proc., p.35, 1997.
    [11] T. M. Pan, T. F. Lei, T. S. Chao, M. C. Liaw, W. L. Yang, M. S. Tsai, C. P. Lu, and W. H. Chang, "Novel cleaning solutions for polysilicon film post chemical mechanical polishing,"IEEE Trans. Electron Device Lett., 21, 338, 2000.
    [12] J. Bjerrum, G. Schwarzenbach, and L. G. Sillen, Stability Constants, p.76, Burlington House, London, 1957.
    [13] F. Tardif, J. Palleau, T. Lardin, O. Demolliens, A. Vincent, and J.Torres, "Wet cleanings adapted to backend processes ,"Microelec. Eng., 33, p.195, 1997.
    [14] T. Ohmi, M. Miyashita, M. Itano, T.Imaoka, and I. Kawanabe,
    "Dependence of Thin Oxide Films Quality on Surface Microroughness," IEEE Trans. Electron Devices, p.537, 1992.
    [15] C. Chang, J. Lien, IEEE IEDM Digest, p.714, D1987.
    [16] T. Y. Chan, J. Chen, P. K. Ko, C. Hu, IEEE IDEM Digest, p.718, 1987.
    [17] Takashi Hori, I. P. Kaminow, W. Engl, Gate Dielectrics and MOS ULSIs, p.128, Berlin Heidelberg, Germany, 1997.
    [18] R. R. Troutman, IEEE Trans. ED-26, p.461, 1979.
    [19] H. Uchida, N. Hirashita, and T. Ajioka, "Enhanced degradation of oxide breakdown in the peripheral region by metallic contamination," Technical Digests of IEDM, p. 405-408, 1990.
    [20] N. Fujino, Extended Abstracts of the 6th International Symp. on Silicon Materials Science and Technology, p. 709-723, 1990.
    [21] Y. Hokari, "Stress voltage polarity dependence of thermally grown thin gate oxide wearout," IEEE Trans. Electron Devices, 35, p. 1299, 1988.
    [22] M. Depas, B. Vermeire, P. W. Mertens, and M. M. Heyns, "Growth kinetics and electrical characteristics of ultra-thin pyrogenic silicon oxide," Microelect. Eng., 28, p. 125. 1995.
    [23] E. Harari, J. Appl. Phys., 49, p. 2478, 1978.
    [24] D. J. Dimaria, E. Cartier, and D. Arnold, "Impact ionization, trap creation, degradation, and breakdown in silicon dioxide films on silicon," J. Appl. Phys., 73, p. 3367, 1993.
    [25] P. P. Apte, T. Kubota, and K. C. Saraswat, J. Electrochem. Soc., 140, p. 770, 1993.
    [26] K. F. Schuegraf and C. Hu, in Proc. IRPS, p. 7, 1993.
    [27] Jordi Sune, G. Mura, and E. Miranda, "Are soft breakdown and hard breakdown of ultrathin gate oxides actually different failure mechanisms? " IEEE Electron Device Letters, 21, p. 167, 2000.
    [28] S. H. Lee, B. J. Cho, J. C. Kim, and S. H. Choi, "Quasi-breakdown of ultrathin gate oxide under high field stress," IDEM Tech. Dig., p.605-608, 1994.
    [29] M. Depas, T. Nigam, and M. M. Heyns, "Soft breakdown of
    ultra-thin gate oxide layers," IEEE Trans. Electron Devices, 43, p. 1499-1503, 1996.
    [30] Atsushi Ando, Kazushi Miki, Kazuhiko Mastumuto, Tetsuo Shinizu, Yukinori Morita and Hiroshi Tokumoto, "Surface Observation and Modification of Si Substrate in NH4F and H2SO4 Solutions," Jpn. J. Appl. Phys. p. 1064, 1996.
    [31] H. F. Schmidt, M. Meuris, P.W. Mertens, S. Verhaverbeke, M. M. Heyns, and M. Kubota, "Ultraclean Technologies: Light Point Defect, Surface Roughness and Metal Contamination," IES 39th Meeting, p. 238-244, 1993.
    [32] Takeshi Hattori, Ultraclean Surface Processing of Silicon Wafers, Berlin Heidelberg, Germany, 1998.

    無法下載圖示 全文公開日期 本全文未授權公開 (校內網路)
    全文公開日期 本全文未授權公開 (校外網路)
    全文公開日期 本全文未授權公開 (國家圖書館:臺灣博碩士論文系統)
    QR CODE