市面上常見的金屬氧化半導體場效電晶體(MOSFET)功率元件使用的材料有矽(Si)及碳化矽(SiC)，後者較前者有耐高壓、切換速率快、導通電阻低、體積小及可承受較高工作溫度等優點，對於減少無謂能源損失及實現體積縮小化有極大幫助，這些巨大優勢使得SiC功率元件/模組成為未來研究之趨勢。
現今功率模組朝向高頻率及高功率方向發展，而高頻率及高功率會導致導通及切換損耗大幅增加，因損耗產生的發熱量也大幅上升，而溫度上升又使得導通損耗及切換損耗增加，造成更高溫度的惡性循環，最終產生熱失控(Thermal Runaway)問題，以致構裝元件易因高熱應力而引發材料疲勞或介面層脫層破壞。因此，如何準確計算功率損耗與晶片接面溫度，進而執行有效的散熱設計對SiC功率模組之設計極為重要。
本論文主要在利用數值模擬方法，深入分析內含12顆1200V SiC MOSFET的三階(Three-Level) T型逆變器(Inverter)在強制對流下不同切換頻率及電流負載的散熱行為，此逆變器係利用弦波脈寬調製技術(SPWM)產生三相正弦波輸出，以驅動無刷直流馬達。為了達成此目的，本論文乃整合了電磁分析、電路模擬及散熱計算等而建立一電磁與電熱耦合分析平台。本論文首先利用電磁分析軟體萃取功率模組內部之寄生電感，將其導入電路模擬軟體以分析模組內部功率元件所有損耗特性，並與數學模型分析結果做比對，而計算此功率模組在不同切換頻率、閘極電阻下每顆SiC MOSFET及體二極體(Body Diode)的切換損耗及導通損耗。接著，藉由熱傳分析建立熱網路 (Thermal Network) 模型，並將電路模型與此熱網路模型結合，導入功率損耗，進行電熱耦合分析模擬，以計算溫度相依的導通損耗，最後求得在此功率損耗下的晶片接面溫度。
本論文亦利用所建之電熱耦合分析平台，進行功率損耗參數化分析及散熱參數化分析，以探討不同參數對功率損耗及散熱效能的影響。結果顯示，降低寄生電感，初始環境溫度及電流負載可以降功率損耗，而降低功率損耗及提高強制對流風速可以有效降低功率模組晶片接面溫度。本論文之研究成果可作為提升SiC功率模組散熱效能的參考。

Silicon carbide (SiC) is a comparatively new semiconductor material. SiC power devices are capable of high voltages, low on resistances and fast operation exceeding conventional Si power devices, and can operate at higher temperatures as well. By using SiC, large reductions in energy losses become possible. This is a major advantage, but SiC also has such other advantages as low resistance, fast, operation, and high-temperature operation, which are also features of SiC. These advantages make SiC power device become the next generation low-loss material of semiconductor.

Recent work on the development of power module has been directed toward high frequency and high power applications. High frequency and high power module inevitably produce massive heat resulting from conduction and switching loss, which would further cause thermal-mechanical reliability issues. Besides, an increasing temperature tends to raise conduction and switching losses of power MOSFETs, which further elevates their junction temperature, and probably lead to thermal runaway or thermal instability, further causing structural warpage and fatigue damage. Therefore, it is very important to accurately estimate the power loss of the power module and consider it with temperature dependence in the calculation of the entire coupled electro-thermal analysis.

The main purpose of this thesis is to evaluate the power and thermal performance of a 3-level T-type inverter which content 12 SiC power MOSFETs through numerical simulation. In the thermal management design of power electronics, it is crucial to couple the electrical model and thermal model. Accordingly, a coupled electro-thermal model is proposed. Firstly, the parasitic inductance is extracted by the electrical extraction software. The result is introduced into the circuit simulation software, and the switching time, switching loss and conduction loss are analyzed. Then, the circuit performs electro-thermal coupled analysis with thermal networks model, calculating the final junction temperature of the chips.
In this thesis, the temperature of the chips is analyzed by electro-thermal coupled analysis. In order to find out a power loss and thermal enhancement design guideline, so reducing the risk of thermal runaway. The parametric analysis of power loss and temperature are applied, discussing the power loss and temperature under different external gate resistance, parasitic inductance, SPWM frequency, output voltage, ambient temperature and airflow speed.

[1] Anthon, A., Zhang, Z., Andersen, M. A., Holmes, D. G., McGrath, B., & Teixeira, C. A. (2017). The Benefits of SiC mosfet s in a T-Type Inverter for Grid-Tie Applications. IEEE Transactions on Power Electronics, 32(4), 2808-2821.
[2] Bai, Y., Meng, Y., Huang, A. Q., and Lee, F. C. (2004). A novel model for MOSFET switching loss calculation. Proc. of the 4th International Power Electronics and Motion Control Conference, Vol. 3, pp. 1669-1672.
[3] Biela, J.; Schweizer, M.; Waffler, S. and Kolar, J. W. (2011): SiC versus Si—Evaluation of potentials for performance improvement of inverter and DC–DC converter systems by SiC power semiconductors. IEEE transactions on industrial electronics, Vol. 58, No. 7, pp. 2872-2882.
[4] Chen, S., Lu, D. H., Wakimoto, H., Nakazawa, H., and Otsuki, M. (2013,). T-type 3-level IGBT power module using authentic reverse block-ing IGBT (RB-IGBT) for renewable energy applications. Proc. of the 1st International Future Energy Electronics Conference,
pp. 229-234.
[5] Chen, Z.; Boroyevich, D. and Burgos, R. (2010): Experimental parametric study of the parasitic inductance influence on MOSFET switching characteristics. International Power Electronics Conference (IPEC), pp. 164-169.
[6] Drofenik, U. and Kolar, J. W. (2005): A general scheme for calculating switching-and conduction-losses of power semiconductors in numerical circuit simulations of power electronic systems. Proc. of International Power Electronics Conference, pp. 4-8.
[7] Graovac, D.; Purschel, M. and Kiep, A. (2006): MOSFET power losses calculation using the data-sheet parameters. Automotive Power Application Note, January 2009, Vol. 1.
[8] Hammadi, M.; Choley, J. Y.; Penas, O.; Louati, J.; Rivière, A. and Haddar, M. (2011): Layout optimization of power modules using a sequentially coupled approach. International Journal of Simulation Modelling, Vol. 24, No. 3, pp. 122-132.
[9] Kim, S. C. (2013). Thermal performance of motor and inverter in an integrated starter generator system for a hybrid electric vehicle. Energies, 6(11), 6102-6119.
[10] Klein, J. (2006): Synchronous buck MOSFET loss calculations with Excel model. Fairchild Semiconductor Application Notes AN-6005, 48.
[11] Meade, T., O'Sullivan, D., Foley, R., Achimescu, C., Egan, M., and McCloskey, P. (2008). Parasitic inductance effect on switching losses for a high frequency Dc-Dc converter. The Twenty-Third Annual IEEE on Applied Power Electronics Conference and Exposition, pp. 3-9.
[12] Merienne, F.; Roudet, J. and Schanen, J. L. (1996): Switching disturbance due to source inductance for a power MOSFET: analysis and solutions. Proc. of the 27th Annual IEEE Power Electronics Specialists Conference. Vol. 2, pp. 1743-1747.
[13] Ravi, L. (2015): Characterization and Loss Modeling of Silicon Carbide Based Power Electronic Converters. M.S. Dissertation in Electrical Engineering, University of Minnesota.
[14] Ren, Y. (2005). High frequency, high efficiency two-stage approach for future microprocessors, Doctoral dissertation, Virginia Tech.
[15] Rodríguez, M.; Rodríguez, A.; Miaja, P. F.; Lamar, D. G., and Zúniga, J. S. (2010): An insight into the switching process of power MOSFETs: An improved analytical losses model. IEEE Transactions on Power Electronics, Vol. 25, No. 6, pp. 1626-1640.
[16] Sang, Tingting. (2003): Integrated Electro-thermal Design Methodology in Distributed Power Systems (DPS). M.S. Dissertation in Electrical Engineering, Virginia Polytechnic Institute and State University.
[17] Schweizer, M., Friedli, T., and Kolar, J. W. (2013). Comparative evaluation of advanced three-phase three-level inverter/converter topologies against two-level systems. IEEE Transactions on industrial electronics, 60(12), 5515-5527.
[18] Staudt, I. (2012). 3L NPC & TNPC Topology. Semikron. Application note AN11001, 12.
[19] Tabisz, W. A.; Lee, F. C. and Chen, D. Y. (1990): A MOSFET resonant synchronous rectifier for high-frequency DC/DC converters. Proc. of the 21st Annual IEEE Power Electronics Specialists Conference, pp. 769-779.
[20] Wang , H. ( 2007): Investigation of Power Semiconductor Devices for High Frequency High Density Power Converters, Ph.D. Dissertation in Electrical Engineering, Virginia Polytechnic Institute and State University.
[21] Wang, G.; Wang, F.; Magai, G., Lei, Y., Huang, A., and Das, M. (2013): Performance comparison of 1200V 100A SiC MOSFET and 1200V 100A silicon IGBT. Energy Conversion Congress and Exposition, pp. 3230-3234.
[22] Wang, J., Chung, H. S. H., and Li, R. T. H. (2013). Characterization and experimental assessment of the effects of parasitic elements on the MOSFET switching performance. IEEE Transactions on Power Electronics, 28(1), 573-590.
[23] Xiong, Y.; Sun, S.; Jia, H.; Shea, P. and Shen, Z. J. (2009): New physical insights on power MOSFET switching losses. IEEE Transactions on Power Electronics, Vol. 24, No. 2, pp. 525-531.
[24] Yang, K. (2015): Transient electro-thermal analysis of traction inverters, M.S. Dissertation in Applied Science, McMaster University.
[25] Yapa, R., Forsyth, A. J., and Todd, R. (2014). Analysis of SiC technology in two-level and three-level converters for aerospace applications. Proc. of the 7th IET International Conference on Power Electronics, Machines and Drives, pp. 1–6.
[26] Yuan, L.; Yu, H.; Wang, X. and Zhao, Z. (2011): Design, simulation and analysis of the low stray inductance bus bar for voltage source inverters. International Conference on Electrical Machines and Systems, pp. 1-5.
[27] 吳長鴻, (2017) “MOSFET功率模組及應用之電熱耦合分析”,逢甲大學碩士論文。
[28] 沈昀徽, (2018) “考慮金屬氧化半導體場效電晶體功率模組之寄生參數於功率損耗之暫態電熱耦合模擬分析”,國立清華大學碩士論文。