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研究生： 洪邦彥
Pan-Yeng Hung
論文名稱： 10位元10MHz二階管線化迴圈式類比數位轉換器
A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
指導教授： 周懷樸
Hwai-Pwu Chou
口試委員:
學位類別： 碩士
Master
系所名稱： 原子科學院 - 工程與系統科學系
Department of Engineering and System Science
論文出版年： 2006
畢業學年度： 95
語文別： 中文
論文頁數： 76
中文關鍵詞： 類比數位轉換器 、管線化 、迴圈式
外文關鍵詞： ADC, pipeline, cyclic
相關次數： 點閱：2  下載：0 
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    • 本論文描述一個10位元迴圈式類比數位轉換器。就類比數位轉換器中最重要的取樣保值電路，以及殘值處理電路作非線性誤差的分析。分析結果可以知道，比較器的位準以及迴圈時脈的控制對於非線性誤差有很大的影響。相較於連續漸進式架構的類比數位轉換器，迴圈式大大的降低了比較器的設計，並為了使取樣速度能夠超過MHz等級，本論文中加入了管線化的技巧，模擬結果顯示其微分非線性度在±0.5LSB以內，積分非線性度最大值為±0.8LSB。完成模擬設計後，進行實際佈局規劃並下線，取得晶片後作實際測試，驗證模擬與實作的差距。電路設計使用TSMC 0.35um 2P4M的製程技術，晶片面積為2120um × 2120um，使用3V的單電壓，功率消耗約為90mW。

    誌謝..........................................................................................................Ⅰ 摘要..........................................................................................................Ⅱ 目錄..........................................................................................................Ⅲ 圖目錄......................................................................................................Ⅵ 表目錄......................................................................................................XI 第一章 緒論..............................................................................................1 第二章 文獻回顧......................................................................................5 2.1 迴圈式類比數位轉換器...............................................................5 2.2 管線化的概念...............................................................................7 2.3 誤差整理與解決辦法...................................................................8 2.4 數位誤差修正.............................................................................10 第三章 迴圈式類比數位轉換器電路設計............................................15 3.1 架構簡介.....................................................................................15 3.2 交換式電容電路設計考量.........................................................16 3.2.1 精確度考量..........................................................................16 3.2.2 速度考量..............................................................................17 3.2.3 電容匹配..............................................................................18 3.3 開關之誤差分析.........................................................................19 3.3.1 通道電荷注入......................................................................19 3.3.2 時脈饋入..............................................................................21 3.3.3 熱雜訊..................................................................................21 3.4 取樣保值電路.............................................................................22 3.5 單級1.5位元電路基本建構......................................................24 3.5.1 運算放大器..........................................................................25 3.5.2 共模回授電路......................................................................30 3.5.3 偏壓電路..............................................................................31 3.5.4 比較器..................................................................................33 3.5.5 子類比數位轉換器..............................................................35 3.5.6 殘值處理電路......................................................................36 3.6 迴圈控制電路.............................................................................39 3.7 時脈產生器.................................................................................40 3.8 數位修正電路.............................................................................41 第四章 電路模擬結果之分析與討論....................................................44 4.1 運算放大器.................................................................................44 4.2 比較器.........................................................................................46 4.3 取樣保值電路.............................................................................47 4.4 殘值處理電路.............................................................................48 4.5 數位電路模擬結果.....................................................................50 4.5.1 時脈產生器..........................................................................50 4.5.2 迴圈控制電路......................................................................51 4.6 迴圈式類比數位轉換器模擬結果.............................................52 第五章 電路佈局與測試環境的規劃與實測........................................56 5.1 佈局考量與技巧.........................................................................56 5.2 類比電路之佈局.........................................................................59 5.2.1 運算放大器..........................................................................59 5.2.2 比較器與子類比數位轉換器..............................................60 5.2.3 取樣保值電路與單級1.5位元電路...................................61 5.3 數位電路之佈局.........................................................................63 5.4 迴圈式類比數位轉換器完整佈局.............................................65 5.5 量測儀器與環境.........................................................................66 5.6 實測步驟與結果.........................................................................66 5.6.1 單級1.5位元電路...............................................................67 5.6.2 迴圈式類比數位轉換器......................................................70 第六章 結論與建議................................................................................72 參考文獻..................................................................................................74

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