以CMOS技術整合的MMICs，有著低成本、小面積和減少拉線所造成的電阻損耗等優點，但金屬線和相鄰元件之間的耦合損耗以及來自摻雜基板的耦合損耗，成為微波電路設計上的一大難題。由於現行CMOS製程低電阻率的矽基板造成的高頻損耗，限制了被動元件在高頻電路的應用。在此論文中，我們分別採取了ground-shielding和微機電後製程兩種方法，改善現行CMOS製程中被動元件的高基板耦合損耗，成功地提高其Q值。在微波濾波器的製作中，採TSMC 0.35μm 2P4M的製程，利用CMOS製程中的金屬層，製作所需的共面波導微帶傳輸線，並經由3D結構模擬軟體HFSS設計其形狀與尺寸，將髮夾型的二分之一波長共振器，設計在38GHz的中心共振頻率，形成一帶斥濾波器。在此研究中，傳輸線採用CPS的結構，以阻絕基板的耦合損耗，提高此濾波器的Q值，其中心頻率（38GHz）Q值約等於20。論文的另一部份則是CMOS微機電壓控振盪器，其電路架構採Cross-coupled 的形式，由TSMC 0.18μm 1P6M製程下線實做。在電路中的LC-tank部分，由於製程中所提供的電感電感值不符合我們的需求，且其Q值也不高，因此，我們將採用自行設計的電感，並利用CMOS微機電後製程的技術，使用簡單的兩道製程程序，改善此LC-tank的效能。首先採用非等向性蝕刻將二氧化矽層移除，接著再採用XeF2等向性蝕刻矽基板，將電感底下掏空，增加電感在高頻的Q值，進而改善振盪器的功率消耗以及相位雜訊。

Due to the high frequency loss from the low resistivity Silicon substrate, the applications of passive component in MIC (microwave integrated circuits) are limited. In this thesis, we use the methods of ground-shielding and MEMS(MicroElectroMechanical system) process to improve the high substrate coupled loss, and enhance the quality factor. The microwave filter fabricated by TSMC 0.35μm 2P4M process, and the half-wavelength hair-pin-like resonator was designed to resonate at 38 GHz to form a band-stop filter. To enhance the quality factor of the filter, the CPS (coplanar stripline) is chosen to prevent the substrate coupled loss. The quality factor is about 20 at the center frequency. The other part of the thesis is the CMOS MEMS VCO (Voltage-Controlled oscillator). In the VCO circuit, the cross-coupled architecture was selected, and fabricated by TSMC 0.18μm 1P6M process. Due to the low quality of inductor provided by the process, we have designed a suitable inductor with improved the quality factor by use of post CMOS MEMS process. The power consumption and phase noise of the VCO can be improved.

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