時下的各種數位系統大多都使用到記憶體。現今最為大家討論，最為熱門的系統晶片（SoC）中，就包含了各式各樣不同種類，不同大小的記憶體核心。由於記憶體是嵌在系統晶片的裡面，較不容易由外部去測試，因而對於系統晶片上記憶體核心的測試就變得更加重要。
在這篇論文中，我們針對系統晶片的環境下，提出了一個微處理器可程式化（Processor-Programmable）的記憶體內建自我測試（BIST）架構。我們希望能建立一個完善的測試架構來執行記憶體測試的功能，並且驗證我們想法的正確性。在這個測試架構裡面，我們建立了一個類似SoC的環境，它包含了一個微處理器（microprocessor），和我們發表的可程式化測試電路，自定的簡單匯流排（self-defined bus），仲裁器(arbiter），輸入/輸出單元（I/O），和記憶體。

在這個測試架構中，大部分的March演算法都可以根據簡單的描述和定義來實現並且產生對應的測試程式。這些測試程式就可以在類似系統晶片的測試環境中來做模擬，最後，一些模擬的結果，和當在測試時，測試到記憶體缺陷的錯誤訊息，都會報告給使用者知道。

和微處理器基礎（Processor-Based）的記憶體測試方法來比較，我們提出的測試電路可以大大降低測試時間。和傳統專有的測試電路（Dedicated BIST）比較起來，在面積的耗費上較少，而且可以改變測試演算法的彈性也來的高許多。

在我們提出的架構裡面，幾乎所有的March測試演算法都可以實現，且可以在類似系統晶片的環境中模擬來驗證演算法的效能，和測試電路功能的正確性。

Memory is now widely used in digital systems. The popular core-based System-on-Chip (SoC) environment always contains some kind and different size of memory cores. The testing for these embedded memory becomes more important and essential.
In this thesis, we will present a processor-programmable memory

built-in self-test (BIST) framework for SoC environment. We promise to build up a friendly and complete test framework to perform memory testing and verify our idea. In our SoC test environment, it includes one microprocessor, the programmable BIST circuit we proposed, self-defined bus, arbiter, I/O, and memory.

The test framework can automatically execute most popular March test algorithms through brief description of March algorithm and register definition for our BIST circuit. It simulates March algorithm in a simple SoC environment after programming BIST circuit via on-chip microprocessor. Finally, it will show the test results and if any error occurs when testing, it can report the erroneous responses and faulty addresses, too.

Compared with processor-based memory BIST schemes that use an

assembly-language program to perform testing and comparison of the memory outputs, the test time of our proposed BIST circuit is greatly reduced. Compared with conventional dedicated BIST circuit, the area overhead can be reduced and flexibility is higher. The proposed framework can perform various March test algorithms and verify the functionality of our BIST circuit.

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