V頻段適應性偏壓功率放大器暨利用預先失真技巧之線性器設計

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研究生：	翁士閔 Weng, Shih-Min
論文名稱：	V頻段適應性偏壓功率放大器暨利用預先失真技巧之線性器設計 Design of V-band Adaptively Biased Power Amplifier with Pre-Distortion Linearizer
指導教授：	劉怡君 Liu, Yi-Chun
口試委員:	謝秉璇 Hsieh, Ping-Hsuan 李俊興 Li, Chun-Hsing
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering
論文出版年：	2018
畢業學年度：	106
語文別：	英文
論文頁數：	164
中文關鍵詞：	適應性偏壓、互補式金屬氧化物半導體、微波、功率合成、預先失真之線性器、V頻段
外文關鍵詞：	adaptive bias, CMOS, millimeter-wave, power combining, predistortion linearizer, V-band
相關次數：	點閱：2 下載：0
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由於人們在2.4 GHz和5 GHz通訊系統上的應用日漸趨於飽和, 人們漸漸將操作頻率提高至毫米波頻段以求更高速的資料傳輸。而60-GHz系統應用憑藉著易衰減與寬頻的特性，使之能廣泛地應用在無線區域網路(WLAN)、無線個人區域網路(WPAN)，以及點對點資料傳輸。由於功率放大器高功率損耗以及較高的設計困難度，在這些通訊系統應用中，功率放大器往往是最重要的子電路。本篇論文提出在功率放大器中較常用到的線性化技巧，以改善功率放大器的特性。
本論文中共有三個功率放大器的設計，第一個設計中加入補償電容改善電晶體的米勒效應(Miller effect)以及利用電流合成技術提升輸出功率。第一個設計具有15.6 dB的線性增益、15%的最大功率附加效率(PAE)與17 dBm的飽和輸出功率(Psat)。在第二個設計中，為改善功率放大器的線性度以及輸出功率，在本設計中加入了利用預先失真技巧之線性器和4路並串聯共用之功率合成器。在量測結果中，其具有12.9 dB的線性增益、12.1 dBm的1-dB輸出功率壓縮點以及3.9%的最大功率附加效率。根據第二個設計的主架構電路，在第三個設計中加入適應性偏壓電路針對功率放大器操作在小訊號時的功率損耗做改善，同時並不會影響到在大訊號時的輸出功率。根據量測結果，此功率放大器在線性器和適應性偏壓電路打開的情況下，1-dB輸出功率點可以從17.7 dBm提升至18.9 dBm，而此點的功率附加效率也從7%提升至13.9%。而線性度的量測結果顯示，在線性器與適應性偏壓電路的作用下，三階輸入交叉點(IIP3)也從2.6 dBm提升至5.1 dBm。

Since the applications in microwave bands have become saturated (2.4 GHz and 5 GHz), people start to shift up the operating frequency to millimeter-wave frequency bands. Thanks to the high attenuation and wide bandwidth properties of 60 GHz band, various applications such as WLANs, WPANs, and point-to-point links are developed. In these communication systems, power amplifier is one of the most important building blocks because it is the most power hungry component and difficult to design. This thesis presents some linearization techniques to save the power consumption of PA without degrading the output power.
There are three works in this thesis. In Work A, to mitigate Miller effect and enhance the output power, a neutralization and current combining techniques are used. It achieves a simulated linear gain of 15.6 dB, a maximum power-added efficiency (PAE) of 15%, and a saturation output power (Psat) of 17 dBm. In Work B, a pre-distortion linearizer and 4-way parallel-series combiner are added to further improve the linearity and output power. In the measurement results, the linear gain is 12.9 dB, OP1dB is 12.1 dBm, and PAEpeak is 3.9% when the linearizer is on. Based on the structure of Work B, an adaptive bias network is added in Work C to save the power consumption at low power mode, and provide sufficient output power at high power mode. According to the measurement results, OP1dB is improved from 17.7 dBm to 18.9 dBm, and PAE at OP1dB enhanced 6.9% (from 7% to 13.9%) when the linearizer and adaptive bias networks are on. In two-tone measurement, a 2.5 dB extension of IIP3 is presented (from 2.6 dBm to 5.1 dBm).

摘要    i
ABSTRACT    ii
Contents    i
List of Figures    iv
List of Table    xiii
Chapter 1    Introduction    1
1.    Motivation    1
2.    V-band Regulations and Applications    2
3.    Literature Survey    3
4.    Thesis Organization    5
Chapter 2    Overview of Power Amplifier    6
1.    Introduction    6
2.    Nonlinear Effects in RF Power Amplifiers    7
2.1    Weakly Nonlinear Effects: Power and Volterra Series    7
2.2    Strongly Nonlinear Effects    8
3.    Important Parameters for Power Amplifier    11
3.1    Power    11
3.2    Efficiency    12
3.3    Linearity    14
3.4    Stability    21
3.5    Optimum Load Impedance of Power Amplifier    24
Chapter 3    Passive and Active Components    26
1.    90-nm CMOS Process    26
1.1    Active Devices    26
1.2    Passive Devices    31
2.    LC Resonant Matching    33
2.1    Inductor Mathematical Model    33
2.2    Inductor Electromagnetic Analysis    35
3.    Transformer Matching    40
3.1    Transformer Mathematical Model    40
3.2    Transformer Electromagnetic Analysis    45
Chapter 4    A V-band Power Amplifier with Pre-Distortion Linearizer    61
1.    Literature Survey    61
1.1    Neutralization Technique [7]    61
1.2    Linearization Technique    63
1.3    Power Combiner    67
2.    Circuit Design    72
2.1    Design Flow    72
2.2    Work A    73
2.3    Work B    89
3.    Simulation and Measurement Results    114
3.1    Small-signal and Large-signal Results of Work A    114
3.2    Small-signal and Large-signal Results of Work B    125
Chapter 5    A V-band Adaptively Biased Power Amplifier with Pre-Distortion Linearizer    135
1.    Literature Survey    135
1.1    Adaptive Bias Technique    135
2.    Circuit Design    138
2.1    Design Flow    138
2.2    Core Circuit of Work C    139
2.3    Simulation and Measurement Results    145
2.4    Discussion and Conclusion of Work C    156
Chapter 6    Conclusion and Future Work    159
Reference    160

                                

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