研究生: |
黃彥翔 Huang, Yen-Hsiang |
---|---|
論文名稱: |
混頻並聯換流器系統 Hybrid-frequency Parallel-inverter Systems |
指導教授: |
吳財福
Wu, Tsai-Fu |
口試委員: |
潘晴財
Pan, Ching-Tsai 陳建富 Chen, Jiann-Fuh 林法正 Lin, Faa-Jeng 鐘太郎 Jong, Tai-Lang 朱家齊 Chu, Chia-Chi |
學位類別: |
博士 Doctor |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2021 |
畢業學年度: | 109 |
語文別: | 英文 |
論文頁數: | 125 |
中文關鍵詞: | 混頻並聯換流器系統 、混頻並聯併網換流器 、混頻並聯不斷電電源供應器 、混頻電流控制 、混頻電壓控制 、漣波補償 、漣波抑制分析 、混頻濾波器設計 、功率分配設計 |
外文關鍵詞: | Hybrid-frequency parallel-inverter system, hybrid-frequency parallel grid-connected inverter, hybrid-frequency parallel uninterruptible power supply, hybrid-frequency current control, hybrid-frequency voltage control, ripple compensation, ripple attenuation analysis, hybrid-frequency filter design, power-distribution design |
相關次數: | 點閱:2 下載:0 |
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本論文提出一種三相四線式混頻並聯換流器系統的分析與設計,解決高功率換流器在高切換頻率下的運作限制。在避免使用高價高頻高功率開關元件情況下,提升系統動態響應、保有低頻漣波抑制功能、以及降低輸出濾波器體積。本研究透過時域數學模型,設計混頻電壓電流控制演算法,也透過時域與頻域設計低頻漣波抑制演算法,並分析系統穩定度,達成混頻並聯換流器的濾波器設計。
在高功率混頻換流器與單、雙台並聯換流器的比較方面,本研究透過供應商提供的開關與鐵芯參數建立MATLAB Simulink開關切換損失、開關導通損失、鐵芯切換損失、導線導通損失等數學模型,並透過dc 760 V/ac 380 V/300 kVA規格,來模擬混頻與單、雙台並聯換流器的性能。結合比較不同頻率單/雙台並聯換流器中的電壓/電流總諧波失真率、暫態響應、電感體積、開關元件成本以及系統效率,本研究根據各式性能指標,指出混頻並聯換流器相較於單/雙台低頻轉換器具有動態提升、抑制電壓電流總諧波失真率以及縮小濾波器體積之效果,同時相較於單/雙高頻轉換器具有損耗抑制以及成本控制之效果,驗證高頻轉換器之應用場域與定位。
在系統功能驗證方面,受限於環境容量,本研究透過建造一台dc 760 V/ac 380 V/10 kVA的三相四線式混頻換流器,並實際測試來驗證併網型與不斷電系統型功能。同時為了驗證MATLAB Simulink模擬模型的有效性,本研究比對dc 760 V/ac 380 V/10 kVA的三相四線式混頻換流器實測驗證結果與同規格下的MATLAB Simulink模擬結果,驗證Simulink模型與實測結果的一致性,也間接提升dc 760 V/ac 380 V/300 kVA規格模擬的有效性。
透過模擬與實測結果,本論文驗證混頻並聯換流器系統,具有提升系統動態響應、保有低頻漣波抑制以及降低輸出濾波器體積之功能。混頻並聯換流器系統可於併網型應用中提高電流追蹤表現,符合IEEE-519之電流注入電網規範。同時,混頻並聯換流器系統可於不斷電系統應用中提升電壓追蹤表現,提供線性負載、整流性負載以及瞬間加載所需的穩定電壓,滿足IEC 62040-3的穩壓規範。
本研究的原創性貢獻簡述如下:
混頻並聯換流器成功整合低頻高功率與高頻低功率換流器,提供系統足夠的動態響應,且避免使用高單價的高頻高功率元件,節省開關成本,增加開關的選擇性。
混頻並聯換流器透過低頻高功率開關元件和高頻低功率開關元件達到不對稱分流,增加系統頻率與功率設計上的自由度,提供相關應用對所需性能規格與成本規格上的平衡選擇。
混頻並聯換流器在不同開關切換頻率下仍然具有低頻漣波抑制功能,使輸出只有高頻漣波成分,有效縮小並聯換流器所需的輸出濾波器體積。
提出混頻並聯換流器的濾波器設計方法與穩定度分析,確保混頻並聯換流器在不同規格下的穩定運行。
提出混頻並聯換流器電流與電壓控制演算法結合漣波抑制演算法與濾波器設計,有效確保輸出電壓電流總諧波失真率與暫態響應符合IEEE-519與IEC 62040-3系統規範。
In this dissertation, a hybrid frequency parallel inverter system (HbFPIS) is presented as a parallel-inverter solution to provide sufficient dynamic performance improvements, current/voltage tracking performance, freedom of designing power/frequency, filter-volume reduction, cost reduction, and loss reduction for power conversion in grid-connected (GC), active power filter (APF), and uninterruptible power supply (UPS) applications. The control algorithm, system parameter design, piece-wise linear model, and stability analyses of the HbFPIS are derived and analyzed with time-domain and frequency-domain models, providing a complete view and design process for future applications.
Based on the comparisons among the simulated results of the 300 kVA single and parallel inverters with different switching frequencies, the proposed HbFPIS has the compromise current/voltage regulation performances between low-frequency (LF) and high-frequency (HF) parallel inverters. The voltage/current total harmonic distortions and filter volume of HbFPIS are lower than those of the LF inverters. The switch cost and loss of HbFPIS are lower than those of HF inverters. The sufficient current/voltage regulation performances are achieved without over-designed high-cost switches applied in single/parallel HF inverters. This indicates that the HbFPIS is a third option that avoids extreme solutions with either low or over-designed performances, costs and losses.
Finally, with the derived controls, designed system parameters, piece-wise linear models, and linear stability analysis, the simulated and experimental results of the designed 10 kVA HbFPIS validate the current/voltage tracking functions, ripple compensation, distortion reduction, dynamic improvement, steady-state system stability, and transient system stability. The output current total harmonic distortions (THDs) complying with the IEEE-519 standard and the output voltage THDs and errors complying with IEC 62040-3 standard indicate that the HbFPIS is a feasible solution for GC, APF and UPS applications.
The original contribution of the dissertation includes the following items:
The proposed HbFPIS successfully combines high-power LF and low-power HF inverters. The integration provides sufficient dynamic response without over-designed high-power HF switches with extra cost. This reduces the construction cost of the inverter and increases the selection of available switches.
The proposed HbFPIS can achieve unbalanced current sharing with switches designed for different frequencies and power ratings. This provides higher design freedom and possibility to balance the performance and cost.
The ripple compensation function of the HbFPIS allows LF ripple attenuation with non-identical switching frequencies. This results in filter-volume reduction for the only remaining HF ripples in output current/voltages.
The filter and system parameter design can ensure the functionality and system stability of the HbFPIS with different power ratings and switching frequencies.
The derived controls, ripple compensation algorithm, and filter design ensure the current/voltage THDs and dynamic performances complying with IEEE-519 and IEC 62040-3.
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