研究生: |
丁奕安 Ting, I-An |
---|---|
論文名稱: |
運用簡化群體演算法於產線平衡規劃問題-以半導體製程為例 Simplified Swarm Optimization for Resource Allocation in Line Balancing of Semiconductor Manufacturing |
指導教授: |
葉維彰
Yeh, Wei-Chang |
口試委員: |
陳光辰
Chen, Kuang-chen 黃佳玲 Huang, Chia-Ling |
學位類別: |
碩士 Master |
系所名稱: |
工學院 - 工業工程與工程管理學系 Department of Industrial Engineering and Engineering Management |
論文出版年: | 2014 |
畢業學年度: | 102 |
語文別: | 中文 |
論文頁數: | 84 |
中文關鍵詞: | 黃光顯影 、半導體製造業 、柔性運算 、平行機台 、機台負載平衡 |
外文關鍵詞: | Photolithography,, Semiconductor Process, Soft Computing, Load Balancing, Parallel Machines |
相關次數: | 點閱:2 下載:0 |
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半導體製造為我國優勢產業中佔有重要的一環。在半導體製程中,以黃光區製程最為繁雜重要,佔了將近整個製程40%~50%的時間,為半導體製程之瓶頸,必須將製程中光罩、機台與晶圓做妥善分配。希望藉由有效的製程規劃,達到減少晶圓Cycle Time(C/T)之目標。
現有黃光區製程技術已經將光阻塗佈、曝光及顯影三者串聯於同一生產平面,而如何再精進減少C/T,除了增加平行機台增加製程速度外,即是用運用晶圓轉機的方法,使每台機台在其的機台負荷能力下,達到最佳的負載量。也就是從黃光區產線平衡規劃的角度檢視黃光區製程:運用晶圓轉機追求產線平衡,進而改善黃光區的人工派工模式。
本研究蒐集科學園區某半導體製造廠的資料來建立晶圓轉機模型,運用柔性運算來提供較佳的轉機派工規劃,經由驗證可知柔性運算能顯著改善人工派工之缺點。其中,經驗證在單目標與雙目標的模型中,又分別以SSO及MM-SSO有較佳的改善幅度。
Semiconductor Process plays an important role in competitive industries in Taiwan. Photolithography is the most complicated and key part in IC process flow, taking up about 40%~50% above all process. It is necessary to allocate mask, machine and wafer in the process flow appropriately. In order to reach efficiency and increase rate of equipment utilization, reducing cycle time(C/T) of wafer on each machine during photolithography is expected.
It's capable of install coater, exposure and developer in series on the same machine to shorten C/T. However, there are still many methods to keep cutting down C/T .Except for adding parallel machine, running the existing parallel machine efficiently is also required. In other words, it makes every machine reach the best in the loading and reduce C/T on the restrictions of mask by transferring goods. It does works, and wafers are produced on time as expected.
This research collected information of an IC manufactory in Science Park to set up a model of photolithography considering all the constraints on process. We found out a better wafer transfer dispatching solution through SSO algorithms and MM-SSO, and establishing a complete arithmetic logic applied to photolithography dispatching system. After testing and debugging, the logical operation can be applied to the follow-up study and demonstration in pratice. It's able to downsize and save time about 70% by algorithms automatic dispatching.
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