近年來網路的普及，各種線上服務也不斷地增加，如網路電話、視訊...等雙向互動式通訊，頻寬需求將大於以往的靜態網路服務，此時傳統的同軸電纜線將被光纖取代，光通訊將邁入新的里程碑。而與半導體製程類似的積體光學元件(integrated-optic components)在這裡佔了舉足輕重的地位，它的元件尺寸大小通常為光波長的數倍，它具備有尺寸小、強固、價位低的潛力。積體光學元件的架構通常為光波導的型態，它的結構可以分為: 緩衝層(buffer layer)、導光層(core layer)、披覆層(cladding layer)，導光層折射率大於其他兩層。根據司乃耳定律(Snell’s Law)，光將被侷限在導光層中而不會被洩漏掉。
本論文為根據多模干涉(multimode interference)原理製作1x4分光器，利用單一模態波導(single mode waveguide)入射至多模波導(multimode waveguide)而激發了許多的模態。而適當控制多模波導長度與寬度，可以選擇出成像的位置，最後由四個單模波導將光給導引出來。製作上利用機台PECVD (Plasma-Enhancement Chemical Vapor Deposition 電漿輔助化學氣相沈積)沈積薄膜，其優點在於薄膜具有低應力、沈積速率快、階梯覆蓋（Step Coverage）能力好，很適合製作光波導元件。首先在矽基板上TEOS(Tetra-Ethyl-Ortho-
Silicate Si(OC2H5)4)有機材料沈積一層折射率較低的SiO2為緩衝層，避免光從矽基底漏出去，之後再以 TEOS(Tetra-Ethyl-
Ortho-Silicate Si(OC2H5)4) 參雜ＴＭＰ(Tri-Methyl-Phosphate P(OCH3)3)的方式增加SiO2的折射率，在緩衝層上面沈積一導光層。由於在蝕刻SiO2時，以光阻做為遮罩其選擇比為1:1.5，可能會出現光阻已被蝕刻完而SiO2卻未蝕刻到所想要的深度；如果以厚光阻為遮罩，光波導線寬將會變小，側璧粗糙度不是很好，側璧垂直角度也不好。因此將以DC Sputter沈積約1350Å金屬鉻做為遮罩其選擇比為1:70，將有效地改善上述的缺點。接下來經過黃光後定義出要蝕刻的圖案，以RIE蝕刻SiO2後為一個脊狀波導(ridge waveguide)，再沈積不參雜TMP(Tri-Methyl-Phosphate P(OCH3)3)之SiO2為披覆層，最後製作完成的元件為一個高度與寬度約5μm的通道型波導(channel waveguide)，由於形狀、結構大小與光纖類似，可預期會有不錯的光纖耦合效率。
此論文為製作一個1x4分光器，在章節安排上，第二章說明自成像原理，及如何形成光干涉元件，最後介紹一些干涉機制:一般干涉、成對干涉、對偁干涉；第三章一一地介紹光波導製程，並將呈現實際製作出元件的圖片，指出一些製程因素所出現的現象；第四章將量測1x4分光器所量測的功率，探討能量損耗產生的原因；第五章為結論。

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