研究生: |
黃峯祥 Huang,Feng-Shiang |
---|---|
論文名稱: |
無乘法器有效記憶體運用的二維小波轉換 A Multiplier-Free Memory-Efficient 2D Discrete Wavelet Transform |
指導教授: |
周懷樸
Chou,Hwai-Pwu |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
原子科學院 - 工程與系統科學系 Department of Engineering and System Science |
論文出版年: | 2008 |
畢業學年度: | 97 |
語文別: | 中文 |
論文頁數: | 60 |
中文關鍵詞: | 小波轉換 |
外文關鍵詞: | wavelet |
相關次數: | 點閱:2 下載:0 |
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在本篇論文,我們提出一個高效率的超大型積體電路架構去實現二維離散小波轉換,離散小波轉換具有多重解析,可以把訊號的頻帶做有效的分離很適合用來做影像的壓縮轉換,本篇利用提升式演算法(lifting scheme)及整數小波轉換(integer to integer mapping)來實現運算單元,提升式主要用來簡化運算過程,而整數式則是可以達到完全反向轉換然,且不因有效位元的取捨而產生誤差,我們提出的架構包含一個列方向及行方向的模組,且使用line based的排程方式可以有效的降低暫存器的數目及提高硬體使用率。
除了上述使用到的演算法及架構外,為了加快小波轉換的處理速度,我們將原來的乘法器用位移器取代以提升轉換的效能。
我們所提出的架構是利用管線化的處理去提升效能,而整體所需的內部暫存記憶體空間是4N+14(包含管線化的暫存器),跟其他所提的架構比較起來,我們所提的架構具有較低的記憶體空間,最後利用硬體描述語言來設計此架構,再由FPGA 元件來實現,此電路運算週期最高可達183MHz。
參考文獻
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